Senior Analog Layout Engineer

Marvell Technology; Santa Clara (CA); On-site; USD 84,000 - 128,000; Full time

Job summary

An innovative firm is seeking a Senior Analog Layout Engineer to join their Central Engineering team. In this pivotal role, you will design and verify analog layouts, collaborate with global teams, and contribute to cutting-edge semiconductor solutions. This position offers the chance to work on impactful projects while developing your skills in a supportive environment. If you're passionate about engineering and eager to make a difference in the tech industry, this opportunity is ideal for you.

Benefits

Flexible Time Off

401k Plan

Year-End Shutdown

Paid Time Off to Volunteer

Floating Holidays

Qualifications

• Fundamental understanding of electrical concepts from an Electrical Engineering degree.
• Specialized coursework in analog design or layout.

Responsibilities

• Design layers of schematics using CAD tools and run simulations.
• Collaborate with designers and present updates to global teams.

Skills

Electrical Concepts

Analog Design

CAD Tools

Communication Skills

Education

Degree in Electrical Engineering

Tools

Cadence Virtuoso

Job description

Join to apply for the Senior Analog Layout Engineer role at Marvell Technology.

2 weeks ago Be among the first 25 applicants.

About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact
As an Analog Layout Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect
You will be working with global teams in Argentina, Singapore, the U.S., and throughout Europe. You’ll receive a schematic from an Analog IC Designer. You will then take that schematic and use a CAD tool to graphically design the layers of that schematic. Then, you run simulations and verifications on the design using Cadence Virtuoso, refine and debug as needed in concert with the designer, and both of you keep iterating the design until it meets the desired specifications.

Each project can last from a couple months to a year and a half. You will likely work on just one project in that time, but may be asked to switch to something else if priorities change. Your flexibility is appreciated.

You’ll meet every few days with the designer you’re paired with to share information and work together. No circuits get built or tested here without you both, so your partnership and teamwork is extremely valuable to Marvell. You’ll also have routine meetings with your technical mentor when you have questions, as well as the layout team and the project team where you may have to speak to the entire group and update them about your progress. You may have to present a particular issue or solution you’ve encountered. We are developing brand new cutting-edge technologies here, so we learn new things frequently and share with our colleagues.

What We're Looking For
To be successful in this role, you must:

• Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
• Have some specialized coursework in analog design or layout, either as part of your Electrical Engineering degree, summer courses, or conference courses.
• Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
• Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell. Fluency in English is required.

Expected Base Pay Range (USD)
84,910 - 127,200, per annum.

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation And Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus, and equity. Health and financial wellbeing are part of the package. That includes flexible time off, 401k, a year-end shutdown, floating holidays, paid time off to volunteer. For questions about our benefits, health, or financial packages, ask your recruiter during the interview.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability, or protected veteran status.

Any applicant requiring a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [e-mail].

Seniority level

• Mid-Senior level

Employment type

• Full-time

Job function

• Engineering and Information Technology

Industries

• Semiconductor Manufacturing

Referrals increase your chances of interviewing at Marvell Technology by 2x.

Get notified about new Senior Layout Engineer jobs in Santa Clara, CA.