Senior AI Accelerator Architect — Data Movement & NoC

Acceler8 Talent; Santa Clara (CA); Hybrid; USD 190,000 - 320,000; Full time

Job summary

Acceler8 Talent is partnering with an early-stage semiconductor startup to lead the data movement architecture within a next‑generation AI accelerator SoC. You will own the architecture and microarchitecture from early definition through tapeout, bring‑up, and silicon optimization.

The role requires deep expertise in NoC design, memory systems, and scheduling, with hands‑on work across architecture, microarchitecture, and implementation.

Qualifications

• Demonstrated expertise in NoC architecture, buffering, memory systems and scheduling.
• Ownership of complex data movement or memory-related hardware across multiple silicon generations.
• Direct experience designing AI accelerators, GPUs, NPUs, or high-performance compute architectures.

Responsibilities

• Architect high-performance data movement pipelines, scheduling mechanisms, and control logic.
• Define and optimize NoCs, crossbars, switches, buffers, scratchpad memories, and memory pathways.
• Develop microarchitectural solutions balancing throughput, utilization, latency, power, and area.

Skills

NoC architecture

Data movement

Memory systems

Scheduling

Crossbar fabrics

Performance per watt

Silicon bring-up

AI accelerator experience

Education

MS/PhD in EE or related field

Tools

Verilog/VHDL

RTL design

Job description

Acceler8 Talent is partnering with an early-stage semiconductor startup to lead the data movement architecture within a next‑generation AI accelerator SoC. You will own the architecture and microarchitecture from early definition through tapeout, bring‑up, and silicon optimization.

The role requires deep expertise in NoC design, memory systems, and scheduling, with hands‑on work across architecture, microarchitecture, and implementation.