Senior 5G MAC Software Engineer

Lever, Inc.

Santa Clara, Northern (CA, KY)

Hybrid

USD 140,000 - 200,000

Full time

6 days ago
Be an early applicant
Application generator

Get a reply from this employer — a resume and cover letter tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Paid holidays
Paid time off
Competitive salaries
Health & wellness benefits

Job summary

E-Space in Santa Clara is building a high-performance space-based IoT network. We are seeking an experienced architect for MAC-side software of a new 5G NR physical layer, with cross-domain collaboration across software, firmware, systems, verification, and hardware teams.

You will define layered MAC architecture, enable host-based simulation, POCs on ARM, FPGA, and ASIC, and drive real-time data flows like PDCCH, PDSCH, HARQ, and timing.

Qualifications

  • Demonstrated experience architecting and delivering embedded C/C++ software for a wireless modem, baseband, or comparable real-time, resource-constrained system.
  • Practical knowledge of 5G NR MAC and 3GPP specs, including scheduling, HARQ, random access, and MAC-PHY interactions.
  • Hands-on debugging of heterogeneous SoCs, shared memory, interrupts, DMA, cache coherency, and multicore synchronization.

Responsibilities

  • Own the software architecture, redesign, implementation, and integration of MAC-side software for a new 5G NR physical layer.
  • Define a portable, layered MAC architecture separating MAC, MAC-PHY interface, platform transport, and OS services; support host-based simulation on ARM, FPGA, ASIC.
  • Define and evolve the MAC-PHY interface, coordinate with PHY and protocol-stack engineers.
  • Implement and debug real-time control/data flows for terrestrial 5G NR (PDCCH,PDSCH,PUSCH,PUCCH,PRACH,SRS,HARQ,CQI).
  • Design low-power communication between ARM software and PHY firmware using shared memory, mailboxes, interrupts, DMA.

Skills

Embedded C/C++
5G NR MAC
SoC HW/SW interfaces
Embedded Linux / RTOS
DSP basics
System architecture
Technical ownership
SystemC TLM

Education

Wireless/Embedded degree

Tools

FPGA/ASIC development

Job description

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!

E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service deliveryassociated with traditional satellite and terrestrial IoT systems.

We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.

What you will do:
  • Own the software architecture, redesign, implementation, and integration of MAC-side software for a new 5G NR physical layer, including PHY integration, emulation, and test capabilities.
  • Define a portable, layered architecture that separates MAC behavior, the MAC-PHY interface, platform transport, and operating-system services. Support host-based simulation, execution on a simulated ARM processor, and deployment on FPGA and ASIC platforms.
  • Define and evolve the MAC-PHY interface, including message sequencing, timing, buffer ownership, compatibility, versioning, and error handling. Coordinate changes with PHY and protocol-stack engineers.
  • Implement and debug real-time control and data flows for terrestrial 5G NR, including PDCCH, PDSCH, PUSCH, PUCCH, PRACH, SRS, HARQ, CQI, timing advance, and measurements.
  • Design low-power communication between ARM software and PHY firmware using shared memory, mailboxes, interrupts, and efficient data movement. Address concurrency, cache coherency, memory ordering, backpressure, timeouts, and recovery.
  • Extend the SystemC TLM virtual platform, with guidance from system designers, and carry the software through FPGA and ASIC integration. Debug system-level failures on simulated and physical SoCs.
  • Build automated regressions, test-vector flows, traces, and KPI checks that correlate behavior across simulation and hardware.
  • Review architecture and code, coordinate dependencies across software, firmware, systems, verification, and hardware teams, and gradually expand into production MAC development.
What you bring to this role:
  • Demonstrated experience architecting and delivering embedded C/C++ software for a wireless modem, baseband, or comparable real-time, resource-constrained system.
  • Practical knowledge of 5G NR MAC and relevant 3GPP specifications, including terrestrial operation, scheduling, HARQ, random access, and MAC-PHY interactions.
  • Hands-on experience debugging heterogeneous SoCs and hardware-software interfaces involving shared memory, mailboxes, interrupts, DMA or similar data movement, cache coherency, and multicore synchronization.
  • Experience developing embedded Linux software and working with an RTOS.
  • Working knowledge of digital communications and DSP sufficient to understand PHY processing constraints, timing, and data flow.
  • Ability to decompose complex systems into clear components and interfaces, make sound architectural tradeoffs, diagnose integration failures, and collaborate effectively across software and hardware teams.
  • A track record of independent technical ownership, supported by reproducible tests, version control, and clear design documentation.
  • Typical background: BS with 7+ years, MS with 5+ years, or PhD with 3+ years of relevant experience in wireless communications, embedded software, computer engineering, or a related field. Equivalent demonstrated expertise is also welcome; these are guidelines rather than mandatory minimums.
Bonus points for the following:
  • Experience modifying SystemC TLM virtual platforms or integrating production software with virtual hardware models.
  • Experience taking embedded modem software through FPGA prototyping, pre-silicon verification, ASIC bring-up, and hardware correlation.
  • Experience designing or extending a MAC-PHY interface such as FAPI, nFAPI, or a proprietary equivalent.
  • Experience with Zephyr, FreeRTOS, vector DSPs, or heterogeneous ARM and DSP SoCs.
  • Experience optimizing modem or baseband software for low power.
  • Experience with 5G NR non-terrestrial networks, including propagation delay, timing advance, Doppler-related coordination, or NTN scheduling and HARQ.
  • Experience contributing to production protocol-stack software, including MAC, RLC, RRC, or a MAC-PHY adaptation layer.
Additional Requirements

This is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected.

$140,000 - $200,000 a year

This is a full time, exempt position, based out of our Santa Clara office. The target base pay for this position is $140,000 - $200,000 annually. The total compensation packaged will be determined by various factors such as your relevant job-related knowledge, skills, and experience.

We are redefining how satellites are designed, manufactured and used—so we’re looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in-orbit activities. If that’s your experience – then we’ll be immediately wow-ed.

E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.

Why E-Space is right for you:

As a member of our team, you will play a crucial role in driving our success. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals. In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry.

We want you to make the most of your journey at E-Space. That’s why we support and invest in the physical, emotional and financial well-being of our team members and their families.

Some of what you can expect when working at E-Space:
  • An opportunity to really make a difference
  • Sustainability at our core
  • Fair and honest workplace
  • Innovative thinking is encouraged
  • Competitive salaries
  • Continuous learning and development
  • Health and wellness care options
  • Financial solutions for the future
  • Optional legal services (US only)
  • Paid holidays
  • Paid time off
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior 5G MAC Software Engineer Software
Senior 5G MAC Software Engineer Software

Front Door Defense • Santa Clara (CA), Northern (KY)

On-site
USD 140,000 - 200,000
Competitive salaries
Paid holidays
Paid time off
+2
Senior 5G MAC Software Engineer
Senior 5G MAC Software Engineer

Espace • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Health and wellness care options
Paid holidays
Paid time off
+1
Senior 5G MAC Software Engineer
Senior 5G MAC Software Engineer

E-Space • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Competitive salaries
Paid holidays
Paid time off
+1
Principal DSP SW Engineer
Principal DSP SW Engineer

Espace • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Competitive salaries
Continuous learning and development
Health and wellness care options
+2
Principal DSP SW Engineer
Principal DSP SW Engineer

Lever, Inc. • California (MO)

On-site
USD 140,000 - 200,000
Paid holidays
Paid time off
Senior DSP SW Engineer
Senior DSP SW Engineer

Espace • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Impactful work
Sustainability focus
Competitive salaries
+5
Principal DSP SW Engineer
Principal DSP SW Engineer

E-Space • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Competitive salaries
Health and wellness care options
Paid holidays
+4
Senior DSP SW Engineer
Senior DSP SW Engineer

Lever, Inc. • Santa Clara (CA)

On-site
USD 140,000 - 200,000
DSP SW Engineer
DSP SW Engineer

E-Space • California (MO)

On-site
USD 100,000 - 200,000
Competitive salaries
Paid holidays
Paid time off
+2
Senior DSP SW Engineer
Senior DSP SW Engineer

E-Space • Santa Clara (CA)

On-site
USD 140,000 - 200,000
Competitive salaries
Paid holidays
Paid time off
+1