Recent Graduate-Process Engineer - Semiconductor Wafer Fabrication

Keysight Technologies; Santa Rosa (CA); On-site; USD 77,000 - 191,000; Full time

Benefits offered by this job

Medical, dental and vision

Health Savings Account

401(k) Plan

Flexible Time Off, Paid Holidays

Paid Family Leave

Tuition Reimbursement

ESPP (Employee Stock Purchase Plan)

Job summary

Keysight in Santa Rosa, CA is seeking an R&D Process Engineer to develop, maintain and optimize wafer fabrication processes for Heterogeneous Integration technologies. This onsite role requires cleanroom work and collaboration across cross-functional teams to deliver high yields and robust process control.

The ideal candidate has an advanced degree in a relevant field or a BS with strong research experience, plus proven ability to manage DOE experiments, data-driven optimization, and complex

Qualifications

• MS or PhD in Materials Science, Electrical Engineering, Physics, Chemistry, Mechanical Engineering, Manufacturing Engineering, or relevant field.
• BS graduates with relevant experimental research experience/internships will be considered.
• Recent graduate with degree by June 2027 or later.
• Must be local or willing to relocate to Santa Rosa, CA.
• Strong problem-solving and analytical skills for controlling process variation.
• Excellent interpersonal, verbal, written and presentation communication skills.

Responsibilities

• Drive process control and stability through SPC, root-cause analysis, and corrective actions using statistical tools.
• Collaborate with other process, integration, product, and circuit design engineers to define targets.
• Define process flows, develop new processes and CPI efforts to maximize yield.
• Develop and maintain high yields; report metrics and changes at dept. level.
• Ensure successful process hand off to manufacturing partners.
• Work with Operations to implement robust process control and diagnose issues.
• Champion capital equipment projects including tool evaluation and qualification.
• Propose DOE plans, conduct experiments, and implement changes safely.
• Collaborate with equipment engineering on tool performance optimization and maintenance.
• Meet accelerated project schedules and communicate risks.

Skills

Process development

Data-driven optimization

Analytical skills

Communication

Accountability

Education

MS/PhD in Materials Science or related field

BS with relevant research/internships considered

Job description

Overview

Keysight is a mission-critical design enablement partner for organizations solving the world's most complex engineering challenges. With deep engineering expertise and leading design, emulation, and test solutions, our ~16,800 employees help customers in over 100 countries accelerate innovation across communications, automotive, energy, quantum, aerospace and defense, semiconductor, and artificial intelligence markets. Learn more about what we do.

At Keysight, people come together to explore new ideas, challenge what's possible, and advance the technologies defining the future. Here you'll find opportunities to do your best work, take your career further, and thrive in an award-winning culture. Learn more about our benefits.

We provide semiconductor technologies that drive Keysight's market leadership and revenue. The High Frequency Technology Center (HFTC) is seeking an R&D Process Engineer to develop, maintain and optimize manufacturing processes to fabricate passive silicon interposer substrates for Keysight's Heterogeneous Integration technology. This position is onsite at Keysight Headquarters in Santa Rosa, CA. Live in beautiful Sonoma County amongst vineyards, redwood forests, rivers, lakes and coastline while working on state-of-the-art advanced packaging technologies.

HFTC is a world-class semiconductor organization that invents, designs, and manufactures state-of-the-art custom integrated circuits (ICs) to enable the industry's highest-performance test and measurement solutions. HFTC's proprietary indium phosphide (InP) and gallium arsenide (GaAs) semiconductor, silicon and heterogeneous integration technologies make possible some of the world's highest-speed and highest-frequency Monolithic Microwave Integrated Circuits (MMICs) and System in Package (SiP) products. Our chips and systems are custom designed to enable instrumentation with unmatched signal fidelity, bandwidth, and dynamic range. Keysight's 50,000 sq. ft. microfabrication facility-paired with deep expertise in design, modeling, and advanced compound semiconductor and silicon manufacturing-provides a distinct competitive advantage in delivering industry-leading performance.

Responsibilities

Develop and sustain custom, cutting-edge, micro and nano-fabrication technologies. The focus of this position is process development, manufacturing sustainability, and R&D support for new product introductions, with specialization in wafer fabrication processes.

• Drive process control and stability through statistical process control (SPC), root cause analysis, and corrective actions using statistical tools (e.g., JMP)
• Work closely with other process, integration, product, and circuit design engineers to define process and performance targets
• Defining process flows, develop new processes and drive continuous process improvement (CPI) efforts to maximize product yield
• Develop and maintain high yields; report process metrics, root cause investigations, and process change implementations at the department level
• Ensure successful process hand off to manufacturing partners
• Work with Operations to implement robust process control and support production processes; diagnose and resolve process problems with urgency
• Champion and lead capital equipment acquisition projects that include tool evaluation, characterization, process development, and qualification
• Propose Design of Experiment (DOE) plans, conducting experiments, and implementing process changes in a controlled fashion.
• Collaborate with equipment engineering on tool performance optimization, preventive maintenance strategies, throughput enhancements
• Meet accelerated project schedules; communicate and manage risks

Depending on the candidate's expertise, responsibilities may include one or more of the following domains:

• Wafer fabrication: PECVD/CVD, dry etch, PVD/sputtering, ashing, or similar vacuum-based processes, electroplating, Chemical Mechanical Planarization (CMP), solvent strip, surface cleaning and preparation.
• Metrology: profilometry, ellipsometry, SEM, XRF, optical microscopy, automatic inspection.
• Broader experience in upstream and downstream processes and the ability to understand process interactions is valued.

Qualifications

Required Qualifications

M.S. or Ph.D. in Materials Science, Electrical Engineering, Physics, Chemistry, Mechanical Engineering, Manufacturing Engineering, or relevant fields coupled with applicable experience training and interest in semiconductor fabrication processes.

B.S. graduates with relevant experimental research experience/internships will also be considered.

Qualified candidates must be a recent graduate in 2026 or degree completed by June 2027.

Candidates must be local or willing to relocate to Santa Rosa, CA.

We are seeking a recent graduate with expertise/academic training or internship experience in one or more of the following areas:

• Cleanroom or related experimental research
• Proven experience in process development and data-driven process optimization
• Strong problem-solving and analytical skills for controlling process variation
• Excellent interpersonal, verbal, written and presentation communication skills. The successful candidate must be able to communicate complex technical information in a clear, concise, and direct manner, present data effectively to both small and large audiences, and collaborate productively across cross‑functional teams.
• Strong accountability, self-initiative and proactive attitude are required for success.

The following qualifications are desired but not required:

• Industrial semiconductor process experience
• Familiarity with vacuum systems, RF power delivery, gas flow control, and chamber hardware configurations
• III‑V compound semiconductors and/or silicon technologies
• Thermal, mechanical and electrical reliability
• Project lifecycle

This role requires working inside a cleanroom for several hours each day. Candidates should be comfortable handling real products and flexing their time between the cleanroom and the office space.

Location: This role requires an in‑person, hands‑on engineer who can physically work with the test systems in Santa Rosa, CA.

This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export‑controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export‑controlled items. Candidates must be a U.S. citizen or lawful permanent resident of the U.S., or protected individual, having authorization from the U.S. government for export‑controlled items under 8 U.S.C. 1324b(a)(3).

Keysight is an Equal Opportunity Employer. Careers Privacy Statement

The level of role will be based on applicable experience, education and skills; Most offers will be between the minimum and the midpoint of the Salary Range listed below.

Santa Rosa, CA Pay Range: MIN $76,870.00 - MAX $191,030

Note: For other locations, pay ranges will vary by region.

This role is eligible for Keysight Results Bonus Program and US Employees may be eligible for the following benefits:

• Medical, dental and vision
• Health Savings Account
• Health Care and Dependent Care Flexible Spending Accounts
• Life, Accident, Disability insurance
• Business Travel Accident and Business Travel Health
• 401(k) Plan
• Flexible Time Off, Paid Holidays
• Paid Family Leave
• Discounts, Perks
• Tuition ReimbursementAdoption Assistance
• ESPP (Employee Stock Purchase Plan)

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