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Samsung Austin Semiconductor is building an advanced semiconductor fab in Taylor, TX. We seek an experienced facilities design engineer to lead the output of 3D Revit models, 2D CAD details, and BOMs, while developing design standards and ensuring on-site execution.
As Senior Engineer Lead, you will mentor a team of 5 engineers and PMs, own BIM workflows, resolve field clashes, and drive RFIs to keep tool turn-on milestones on schedule.
About Samsung Austin SemiconductorSamsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow. Come innovate with us!
Samsung Austin Semiconductor is building an advanced semiconductor fab in Taylor, TX. We aim to help our customers achieve advancements in artificial intelligence, autonomous driving, and humanoid robotics with our next generation process technology behind the silicon. Samsung is looking for an experienced facilities design engineer to join our mission. The Senior Engineer Lead is responsible for the output and delivery of 3D Revit models, 2D CAD details, and Bills of Materials (BOMs) to Samsung’s partners in construction. This person will also lead in the team in developing and maintaining design standards, performing and confirming fundamental engineering analysis of design, resolving field clash issues, and closing RFIs to support build-out. This person is responsible for the technical quality, design integrity, schedule, and professional growth of the team. The role requires close partnership with our construction leads, trade contractors, and fab engineering to deliver high quality semiconductor facilitization to the manufacturing floor. This is a technical people-leadership role requiring the ability to drive cross‑functional engineering alignment, enforce quality standards, and eliminate field conflicts to meet critical tool turn‑on milestones.
The current base salary range for this role is between $113,500 - $151,500. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.
At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.
We offer a comprehensive benefits package, including:
Eligible full‑time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
All positions at Samsung Austin Semiconductor are full‑time on‑site.
This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.
By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
건설/건축 관리 안전 설비 | 엔지니어 | 시설관리
Samsung is a world leader in advanced semiconductor technology, founded on the belief that the pursuit of excellence creates a better world. At Samsung Austin Semiconductor, we are Innovating Today to Power the Devices of Tomorrow.
Come innovate with us!
Samsung Austin Semiconductor is building an advanced semiconductor fab in Taylor, TX. We aim to help our customers achieve advancements in artificial intelligence, autonomous driving, and humanoid robotics with our next generation process technology behind the silicon. Samsung is looking for an experienced facilities design engineer to join our mission. The Senior Engineer Lead is responsible for the output and delivery of 3D Revit models, 2D CAD details, and Bills of Materials (BOMs) to Samsung’s partners in construction. This person will also lead in the team in developing and maintaining design standards, performing and confirming fundamental engineering analysis of design, resolving field clash issues, and closing RFIs to support build‑out. This person is responsible for the technical quality, design integrity, schedule, and professional growth of the team. The role requires close partnership with our construction leads, trade contractors, and fab engineering to deliver high quality semiconductor facilitization to the manufacturing floor. This is a technical people‑leadership role requiring the ability to drive cross‑functional engineering alignment, enforce quality standards, and eliminate field conflicts to meet critical tool turn‑on milestones.
The current base salary range for this role is between $113,500 - $151,500. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.
At Samsung Austin Semiconductor, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.
We offer a comprehensive benefits package, including:
Eligible full‑time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
All positions at Samsung Austin Semiconductor are full‑time on‑site.
This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.
By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
2026.09.01 ~ 2026.12.31 D-60