Radar & SAR FPGA Firmware Architect

ICEYE US; Irvine (CA); On-site; USD 145,000 - 175,000; Full time

Benefits offered by this job

Health coverage

Flexible PTO

Friendly work environment

Extra perks

Job summary

ICEYE US is seeking a Firmware Engineer to design, develop, and verify firmware for radar and SAR payload electronics. You will own FPGA architecture for signal generation, DSP, and hardware-software interfaces within the payload chain, collaborating with RF, systems, and embedded software engineers to deliver flight-ready firmware.

This role emphasizes RTL development (VHDL/Verilog) on Xilinx RFSoC/UltraScale+ platforms, HDL verification, timing closure, and integration with ARM-based SoCs.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field; Master's preferred.
• 5-8 years FPGA firmware design in VHDL/Verilog.
• 3+ years Xilinx AMD tool experience (Vivado, Vitis, Vivado HLS).
• 3-5 years DSP implementation in FPGA fabric (filters, FFTs, DDC, waveform generation).
• 3-5 years firmware for SoC architectures with PS-PL on Zynq or Zynq UltraScale+.
• Working knowledge of high-speed serial interfaces and standard bus protocols.

Responsibilities

• Design, implement, and verify FPGA firmware for radar signal generation, digital beamforming, and SAR data processing pipelines.
• Develop and maintain RTL (VHDL/Verilog) targeting Xilinx RFSoC and UltraScale+ platforms.
• Architect a modular FPGA framework supporting multiple product configurations and reducing NRE for future payload variants.
• Integrate FPGA firmware with embedded software (Linux/bare-metal) on ARM cores in SoC.
• Define high-speed digital interfaces between FPGA fabric and RF/analog front-end hardware.
• Perform timing closure, resource optimization, and power analysis for flight-grade FPGA builds.
• Develop FPGA verification strategies including simulation, hardware-in-the-loop testing, and integration with test environments.
• Collaborate with RF and systems engineers to translate radar requirements into FPGA design specs.
• Support AIT with firmware builds, diagnostic modes, and debugging during payload integration.
• Create and maintain configuration-managed firmware baselines, release docs, and design descriptions.
• Participate in design reviews, trade studies, and risk assessments related to FPGA and digital subsystems.

Skills

FPGA firmware

VHDL/Verilog

Xilinx (AMD) tools

DSP in FPGA

SoC PS-PL integration

ARM cores on SoC

High-speed serial interfaces

RF/analog interfaces

Education

Bachelor's in Electrical/Computer Engineering

Master's preferred

Tools

Vivado

Vitis

Vivado HLS

Job description

ICEYE US is seeking a Firmware Engineer to design, develop, and verify firmware for radar and SAR payload electronics. You will own FPGA architecture for signal generation, DSP, and hardware-software interfaces within the payload chain, collaborating with RF, systems, and embedded software engineers to deliver flight-ready firmware.

This role emphasizes RTL development (VHDL/Verilog) on Xilinx RFSoC/UltraScale+ platforms, HDL verification, timing closure, and integration with ARM-based SoCs.