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Applicants in the County of Los Angeles: Qualified applications with arrest or conviction records will be considered for employment in accordance with the Los Angeles County Fair Chance Ordinance for Employers and the California Fair Chance Act.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Goleta, CA, USA; Los Angeles, CA, USA; Mountain View, CA, USA; Seattle, WA, USA; San Francisco, CA, USA.Minimum qualifications:
- Bachelor's degree in Physics, Computer Science, Electrical Engineering, or equivalent practical experience.
- 3 years of experience working in a physics research environment utilizing software engineering tools for layout design and development.
- Experience with Python or other programming languages.
- Experience with programmatic CAD layout and verification tools.
- Experience with Electromagnetic simulations and Finite Element Simulation tools (e.g. Sonnet, HFSS, Comsol).
Preferred qualifications:
- Master's degree or PhD in Physics, Computer Science, Electrical Engineering, or equivalent practical experience.
- 5 years of experience working in physics research environment utilizing software engineering tools for layout design and development.
- Knowledge of Layout vs Layout, Layout vs Schematic, K-Layout or equivalent CAD viewer.
- Familiarity with IC fabrication techniques and processes.
- Familiarity with superconducting circuit architectures and quantum computing.
About The Job
As an Integrated Circuit Designer, you will support the physical design and simulations of quantum processors and associated analog, DC, and RF devices and help to build infrastructure for design production. You will work closely with other members of our team to produce complex processor designs and integrate prototype designs through predefined layout and simulations workflows. Your activities will span from laying out mask schematics and running finite element simulations to integrating design metadata in various software tools and expanding on current design infrastructure and automation.
The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.
The US base salary range for this full-time position is $147,000-$216,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Support complex Quantum processor design projects including device layout and simulations.
- Work on programmatic layout and simulation infrastructures to speed up and simplify layout workflow from initial layout to final tapeout.
- Work closely with other teams to maintain and improve layout integration tools into device probing, packaging and measurement.
- Work with foundries to support custom Process Design Kits (PDKs) and design rule check.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
Seniority level
Seniority level
Not Applicable
Employment type
Job function
Job function
Other, Information Technology, and EngineeringIndustries
Information Services and Technology, Information and Internet
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