Quantum PDK Engineer

GlobalFoundries; Essex Junction (VT); On-site; USD 98,000 - 176,000; Full time

Job summary

GlobalFoundries in Essex Junction, Vermont is seeking a Quantum PDK Design Enablement engineer to contribute to scalable quantum computing platforms. The role emphasizes the development and maintenance of Process Design Kits (PDKs), supporting both advanced quantum device physics and semiconductor manufacturing.

Candidates should have a strong background in semiconductor design enablement and experience with EDA tools. This position offers competitive salaries in the range of $98,000 - $176,000 based on qualifications.

Qualifications

• 5–6+ years of experience in semiconductor design enablement or PDK development.
• Strong knowledge of semiconductor device physics and electronic devices.
• Experience with scripting in Unix/Linux environments.

Responsibilities

• Develop, deploy, and maintain PDKs for quantum devices.
• Create device libraries and parameterized cells (PCells).
• Integrate and validate PDKs within EDA environments.

Skills

Semiconductor design enablement

Device modeling

EDA tools

Scripting (Python, Tcl, Perl)

Strong analytical skills

Education

BS in Electrical Engineering, Microelectronics, Physics, or related field

Tools

Cadence Virtuoso

Job description

Introduction

The Quantum PDK Design Enablement (MTS) role is a technical contributor within the Quantum Technology Solutions organization focused on enabling scalable quantum computing platforms. This position supports development of Process Design Kits (PDKs), compact models, and design enablement infrastructure that bridge advanced quantum device physics with semiconductor manufacturing and circuit design, including cryogenic control and readout ICs. This role operates at the intersection of device physics, modeling, and EDA, translating emerging quantum device technologies into usable, manufacturable, and customer‑ready design environments.

Summary Of Role

As a Member of Technical Staff, this role contributes to the development, deployment, and support of PDKs for quantum device platforms and associated cryogenic electronics. The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production‑ready design collateral. The position emphasizes hands‑on technical execution, automation, and strong cross‑functional collaboration across device engineering, process integration, modeling, and design teams to enable scalable and high‑performance quantum systems.

Essential Responsibilities

• Develop, deploy, and maintain PDKs (tech files, model files, rule decks, runtime code) for quantum devices and cryogenic control/readout ICs
• Create device libraries and parameterized cells (PCells), translating process design rules and SPICE/model specifications into design‑ready implementations
• Support compact model development, parameter extraction, and correlation across TCAD, silicon data, and cryogenic characterization
• Integrate and validate PDKs within EDA environments (e.g., LVS/DRC, simulation flows), including development of automation tools representing fab processes
• Design test structures and test chips, and develop validation plans to ensure model accuracy and silicon correlation
• Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high‑quality customer deliveries
• Analyze device and circuit data to identify variability, reliability risks, and performance trends; support yield‑learning and root‑cause analysis
• Create and maintain PDK documentation (release notes, application notes, known issues) and communicate usage guidance to users
• Collaborate cross‑functionally with device, process, integration, and EDA teams to align design enablement with technology capabilities
• Contribute innovative ideas that may lead to intellectual property, patents, or advanced design enablement methodologies

Other Responsibilities

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

• BS (MS preferred) in Electrical Engineering, Microelectronics, Physics, Computer Science, or related field
• ~5–6+ years of experience in semiconductor design enablement, PDK development, or EDA
• Strong knowledge of semiconductor device physics and electronic devices
• Experience with EDA tools (e.g., Cadence Virtuoso or similar) and design flows
• Experience with device modeling, test structures, or silicon validation
• Familiarity with scripting (e.g., Python, Tcl, Perl) and Unix/Linux environments
• Strong analytical, debugging, and problem‑solving skills
• Effective communication and teamwork skills; detail‑oriented and self‑motivated

Preferred Qualifications

• Experience with Cadence SKILL, PCell development, and PDK architectures
• Background in TCAD simulation and compact model correlation
• Familiarity with variability modeling, SPC, or statistical analysis methods
• Experience with cryogenic electronics or low‑temperature device behavior
• Exposure to quantum devices, superconducting systems, or quantum computing hardware
• Experience working with EDA vendors or enabling custom design flows
• Knowledge of ML/AI techniques applied to modeling or EDA workflows

Expected Salary Range

$98,000.00 - $176,000.00

The exact salary will be determined based on qualifications, experience, and location.

Accommodation

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case‑by‑case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

Equal Opportunity

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law.