Product Development Engineer: Post-Si Characterization & Equity

Nvidia Corporation in; Santa Clara (CA); On-site; USD 160,000 - 213,000; Full time

Job summary

NVIDIA Corporation is seeking a Product Development Engineer specializing in Post-Si Characterization to drive architecture-to-market, partnering with design and test teams to ensure robust silicon delivery. The role emphasizes data-driven decisions, DFT/DFT-aware testing, and cross-functional leadership across foundry and QA groups.

The candidate will contribute to advancing ATE test flows, characterize devices, and help shorten silicon release cycles while leveraging JMP for data analysis.

Qualifications

• Bachelor's or Master's in Electrical Engineering or equivalent experience.
• 5+ years in product development engineering or related field.
• Strong problem-solving and data-driven decision making.
• Experience with digital design, circuit analysis, characterization and qualification.

Responsibilities

• Drive latest architecture designs to market.
• Pioneer ATE test methodologies for next-generation GPU circuits and silicon processes.
• Identify and resolve yield bottlenecks and analyze test failures.
• Propose DOEs and solutions to complex characterization problems.
• Lead cross-functional efforts with foundry, DFT, test, planning and quality teams.
• Influence next-generation ASIC designs to improve testability and qualification timelines.

Skills

Problem solving

Data-driven decisions

Cross-functional collaboration

Statistical analysis

Independent work

Education

Bachelor's or Master's in Electrical Engineering

Tools

JMP

Job description

NVIDIA Corporation is seeking a Product Development Engineer specializing in Post-Si Characterization to drive architecture-to-market, partnering with design and test teams to ensure robust silicon delivery. The role emphasizes data-driven decisions, DFT/DFT-aware testing, and cross-functional leadership across foundry and QA groups.

The candidate will contribute to advancing ATE test flows, characterize devices, and help shorten silicon release cycles while leveraging JMP for data analysis.