Product and Test Engineer

Allegro MicroSystems, LLC; Manchester (NH); On-site; USD 85,000 - 120,000; Full time

Job summary

Allegro MicroSystems, LLC is seeking an energetic Product and Test Engineer with about 5 years in the semiconductor industry. You will develop, debug, and sustain production test solutions for isolated gate drivers, collaborating with Analog Design, Systems Engineering, and global manufacturing teams from design to silicon release.

The role focuses on ATE programming, wafer sort/test, DIB/load boards, high-voltage safety, and data-driven yield analysis while engaging in cross-functional debug

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 2–6 years in semiconductor Product and/or Test Engineering.
• Proficiency in writing and debugging ATE test code (C/C++ or tester languages).
• Knowledge of analog circuit fundamentals and high-voltage test constraints.

Responsibilities

• Develop, debug, and optimize test programs for mixed-signal ATE platforms.
• Create robust wafer-level and final test methodologies using probe cards and DIB/Load boards.
• Perform stress testing, screen failures, and data logging for yield analysis.
• Collaborate with Design, Systems, and Manufacturing teams across locations.

Skills

ATE programming

C/C++

Analog fundamentals

Test methodology

Statistical analysis

Education

Bachelor's degree in Electrical Engineering

Tools

Altium

PCB Cadence

Job description

The Allegro team is united by a clear purpose—advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business—from breakthrough product development and customer success to how we show up for each other and the communities we serve.The OpportunityWe are seeking an energetic and detail-oriented Product and Test Engineer with approximately 5 years of semiconductor industry experience to join our growing High Voltage Power (HVP) business unit. In this role, you will be responsible for developing, debugging, and sustaining production test solutions for our state-of-the-art isolated gate drivers. You will collaborate closely with Analog Design, Systems Engineering, and global manufacturing teams from early design through final silicon release.What You Will DoTest Solution Development (ATE & Wafer Sort)ATE Programming: Develop, debug, and optimize test programs on mixed-signal Automated Test Equipment (ATE) platforms (e.g., Teradyne ETS-364/ETS-88, LTX-Credence, or similar mixed-signal testers).Wafer Probe & Final Test: Create robust test methodologies for both wafer-level sorting (utilizing probe cards and Scribe Line Monitors) and final packaged testing (using DIB/Load boards and high-speed sockets).Stressing & Screening: Implement mandatory DFT methodologies such as Short Voltage Elevation (SHOVE) stress testing, Gate Stress, and IDDQ/quiescent current screening to catch early-life oxide or via defects.Hardware & Interface DesignDIB/Load Board Design: Design, verify, and document Device Interface Boards (DIB), load boards, and handler interface hardware.High Voltage Safety: Ensure test hardware incorporates proper creepage, clearance, and safety protocols required to test high-voltage devices (working voltages up to 1000V+ and CMTI transients).Silicon Characterization & ValidationData Log Analysis: Execute characterization plans over voltage and temperature corners (-40°C to 125°C/150°C).Statistical Analysis: Analyze test data utilizing statistical process control (SPC) tools, DPAT (Dynamic Part Average Testing), and SBL (Statistical Bin Limits) to establish stable production test limits.Failure Analysis: Debug and resolve silicon-level and hardware-level test failures during pre-production validation phases.Cross-Functional CollaborationDesign & DFT Support: Participate in DFT reviews with Analog/Digital Design Leads to define test modes, trim algorithms, and verify register/EEPROM default configurations.APQP Lifecycle Integration: Deliver mandatory PTE documentation (e.g., Test Coverage Summaries, Yield & Test Time Summaries) required to pass major APQP phase gates from Kickoff (KO) to Release to Production (RTP).What You Will NeedBachelor’s degree in Electrical Engineering, Electronic Engineering, or a related discipline (Master's degree is a plus).2–6 years of experience in semiconductor Product and/or Test Engineering, ideally with high-voltage, analog mixed-signal, or power management ICs.Proficiency in writing and debugging ATE test code (C/C++ or specialized tester languages).Solid understanding of analog circuit fundamentals (operational amplifiers, LDOs, DACs, ADCs, gate driver stages).Familiarity with high-voltage test constraints, high CMTI environments, and galvanic isolation parameters.Experience with PCB design software (Altium, PCB Cadence or similar) for load board schematic/layout review.Knowledge of statistical analysis tools (such as Galaxy or similar) for yield and data log analysis.Highly organized, proactive communicator, and a strong problem solver who enjoys working in a collaborative, cross-functional global team environment.Why Allegro?Join Allegro and become part of a team where your contributions truly matter.We foster a culture of Real Innovation, empowering you to push boundaries, develop cutting-edge solutions, and drive continuous improvement.Your work will create a Real Impact by solving complex real-world challenges that fuel our success and shape the future of technology.You’ll experience Real Connection, collaborating with talented colleagues around the globe in an environment built on trust, respect, and a shared purpose.Join us—and help build what’s next.At Allegro, we are committed to providing a harassment-free environment of mutual respect to fuel innovation through inclusive thought collaboration. Allegro is an Equal Opportunity Employer and does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, national origin, veteran status, parental status, or any other basis covered by appropriate law. Allegro makes hiring decisions based solely on qualifications, merit, and business needs at the time.Eligible applicants must reside in a state where Allegro currently has an office location: This includes New Hampshire, Massachusetts, Texas, and Michigan. Certain positions (such as field sales roles) may be exempt from this requirement.