Process Integration Engineer (Reader) (49948)

Headway Technologies; Milpitas (CA); On-site; USD 121,000 - 160,000; Full time

Job summary

Headway Technologies in Milpitas, CA, seeks a Process Integration Engineer (Reader) to advance wafer-level integration for next generation recording heads. Under the Manager of Reader Integration, you will perform characterization, failure analysis, and action plans across prototype wafers in a cleanroom environment.

The role requires a 4-year degree in engineering or physics, 3 years semiconductors experience, and proficiency with JMP and MS Office.

Qualifications

• Bachelor’s degree in Electrical Engineering, Materials Science, or Physics required.
• Three years of hands-on process integration or characterization experience in semiconductors.
• Experience with JMP or similar analytical tool.
• Proficient with Microsoft Office applications.

Responsibilities

• Develops and delivers process integration and characterization techniques for new programs.
• Designs experiments to verify process robustness and analyzes data.
• Performs failure analysis on new processes and recommends corrective action.
• Conducts wafer level probing data analysis and yield improvement.
• Performs wafer level characterization on recording heads using FIB and CD-SEM.
• Reviews backend performance data and suggests improvements.
• Drives process characterization improvements to boost production yields.
• Uses JMP or similar software to identify root causes of variation.

Skills

Process integration

Communication

Analytical skills

Problem solving

Time management

Education

Bachelor’s degree in Electrical Engineering, Materials Science, or Physics

Master’s or PhD preferred

Tools

JMP

MS Office

Job description

Job Details: Job Location: Bldg 3 HDQ - Milipitas, CA, Position Type: Full Time, Education Level: 4 Year Degree, Salary Range: $121000.00 - $160000.00Salary/year, Job Shift: Days, TITLE: PROCESS INTEGRATION ENGINEER (READER)

SUMMARY:

Under the direction of the Manager of Reader Integration, the Process Integration Engineer (Reader) is responsible for the process integration and characterization of prototype wafers for new technology programs and next generation projects, including performing wafer level process characterization, conducting failure analysis on newly developed processes, and recommending corrective action. This position is located in Milpitas, California.

ESSENTIAL FUNCTIONS:

• Develops and delivers process integration and characterization techniques for new technology programs and next generation products
• Design and conduct experiments to verify process robustness; analyzes data, reports findings, and perform FMEA to meet the product requirements.
• Conducts failure analysis on newly developed processes and recommends corrective action.
• Participates in characterization or integration projects of various scopes and complexity; ensures they are completed within the established timeframe
• Conducts wafer level probing data analysis, failure analysis and yield improvement to ensure the final yield meets customer requirements
• Performs wafer level process characterization on thin film recording heads via Focused Ion Beam (FIB) tool and CD-SEM to identify defects and recommends corrective action
• Reviews and analyzes backend performance data and makes recommendations to improve performance
• Drives improvements to the characterization process which improve production yields via process/tool manufacturability optimization
• Analyzes data using JMP, MS Visual Basic, or similar software application to determine the root cause of process variations; develops charts or reports and presents findings before groups or teams
• Responds to inquiries from other team members, managers, or departments
• Adheres to all safety policies and procedures as required
• Performs other duties of a similar nature or level*

Qualifications: MINIMUM QUALIFICATIONS:

• Bachelor’s degree in Electrical Engineering, Materials Science, or Physics and/or equivalent relevant experience; Master’s or PhD degree preferred
• Three years of hands on experience working in the process integration or characterization in a semiconductor environment in a manufacturing or process engineering role
• Hands on experience using JMP or similar analytical application
• Proficient in the use of Microsoft Office Applications

Required Knowledge, Skills, and Abilities:

• Knowledge of process integration and characterization principles, practices, and techniques
• Knowledge of magnetic recording head or HDD manufacturing
• Knowledge and ability to use Microsoft Office applications to create spreadsheets, Word documents, and presentations
• Ability to design experiments, analyze results, and recommend corrective action
• Communicate effectively, both verbally and in writing, with all levels of contractors, consultants, employees, and management
• Ability to work productively and collaboratively with all levels of employees and management
• Ability to comply with all safety policies and procedures
• Ability to use critical thinking to resolve issues, conduct root cause analysis, and make recommendations for process improvements
• Demonstrated analytical skills
• Demonstrated organizational and time management skills
• Demonstrated problem-solving and trouble shooting skills
• Flexible and able to prioritize

*Other duties of a similar nature or level are duties that may be required but may not be specifically listed in the job description or posting.

The annual rate for this full-time position is between $121,000.00-$160,000.00 + bonus target + benefits. Within the range the individual pay may differ depending on additional factors including job responsibilities, job related knowledge, skills, abilities, education, and experience. The annual pay range shown is subject to change and may be modified periodically.

WORKING CONDITIONS:

The Process Integration Engineer works primarily in an office environment from Monday thru Friday. The schedule may be altered from time-to-time to meet business or operational needs; may travel from building-to-building as needed. Also works in a class 100 ESD sensitive wafer manufacturing facility; wears a cleanroom (bunny) suit, including hood, gloves, safety glasses, booties, and mask. May be exposed to hazardous conditions, chemicals, fumes, and/or gases during the course of work day; may be exposed to loud noise. Stands, walks, bends, twists, and crawls. Performs various fine grasping movements; operates a computer and enters information using a keyboard, operates a telephone, and other office equipment; may occasionally push, pull, or lift up to 20 pounds.

TDK/Headway Technologies, Inc. provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, gender, national origin, age, disability, or genetics. Applicants requiring accommodation in order to complete the application process should contact the Headway Human Resources Department.