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Principal Verification Engineer-DDR Exp

Rambus, Inc.

San Jose (CA)

Hybrid

USD 129,000 - 241,000

Full time

30+ days ago

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Job summary

Join a leading chip and silicon IP provider as a Principal Verification Engineer in San Jose, California. This dynamic role involves technical leadership in verification for innovative memory interconnect designs, where you'll collaborate with top engineers to enhance product performance and security. You will define verification plans, implement advanced methodologies, and mentor junior designers while contributing to a culture of diversity and inclusion. With a competitive compensation package and a commitment to innovation, this opportunity is perfect for those looking to make a significant impact in a forward-thinking environment.

Benefits

Competitive compensation package
Bonus
Equity
Matching 401(k)
Employee stock purchase plan
Comprehensive medical benefits
Comprehensive dental benefits
Time-off program
Gym membership

Qualifications

  • 10+ years of experience in verification with MS EE or 7+ years with PhD EE.
  • Strong experience in System Verilog, Verilog, and UVM methodology.

Responsibilities

  • Lead verification for full chip and blocks, defining plans with architects.
  • Implement testbenches and ensure thorough verification of designs.

Skills

System Verilog
Verilog
UVM methodology
DDR memory interfaces
ASIC Verification flow/software tools
Analog/Mixed-signal products
Scripting
Linux/Unix environment
Technical leadership
Communication skills

Education

MS in Electrical Engineering
PhD in Electrical Engineering

Tools

Verification tools
Testbenches

Job description

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

As a Principal Verification Engineer, the candidate will be reporting to the Director of Design Engineering and is a Full-Time position. Successful applicant will have a highly visible role in product design across Rambus sites and take ownership of defining and executing verification plan for products.

Location: San Jose, CA or Morrisville, NC

Responsibilities
  • Technical lead for full chip and/or blocks level verification
  • Define verification plan in co-ordination with Architects, Logic and Mixed-signal designers
  • Implement testbenches, monitors and scoreboards using UVM methodology
  • Achieve code coverage goals and ensure thoroughly verified designs
  • Work with the Lab/System team for test plan, silicon bring up and debug
  • Work in a dynamic and interdisciplinary R&D group contributing to flow and methodology development
  • Mentor junior designers
Qualifications
  • MS EE and 10+ years or PhD EE and 7+ years’ experience of Verification
  • Significant Experience with coding in System Verilog or Verilog and UVM methodology
  • Experience in verification of DDR memory interfaces is highly desirable
  • Significant Experience with standard ASIC Verification flow/software tools
  • Experience working in Analog/Mixed-signal products is highly desirable
  • Strong knowledge of scripting, Linux/Unix environment
  • Experience in leading and driving technical solutions across organization
  • The position requires good written & verbal communication skills as well as a strong commitment and ability to work in cross functional and globally dispersed teams

About Rambus

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions that speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

The US salary range for this full-time position is $129,300 to $240,100. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others. Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation. At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

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