Principal Post-Silicon Validation Engineer

SambaNova Systems; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Benefits offered by this job

Health insurance

Dental & Vision coverage

HSA with employer contributions

Job summary

SambaNova Systems is seeking a Principal Engineer to own post-silicon bring-up, debug, and validation of high-speed IO and memory subsystems within the DataScale platform. This hands-on role requires deep expertise across silicon, board, and software, to drive issues to root cause from first silicon through field deployment.

You will lead system-level debugging, mentor teams, and build automation to scale validation across programs, ensuring timely product releases and robust performance at

Qualifications

• MS in Electrical Engineering, Computer Science, or related field.
• 7+ years in post-silicon validation or system bring-up.
• Experience with high-speed IO/memory protocols (PCIe, Ethernet, HBM, CXL, UCIe).
• Ability to lead cross-functional debug to root cause and closure.
• Strong data analysis and test development skills.
• Proficiency in Python and Bash scripting.
• Clear communicator with collaborative problem-solving approach.

Responsibilities

• Own post-silicon bring-up and validation of high-speed IO and memory subsystems across silicon, board, and software.
• Establish power-on readiness, including debug infrastructure and tooling.
• Lead system-level debug to root-cause complex issues spanning multiple layers.
• Drive issue resolution with design, firmware, verification, and system teams.
• Collaborate with system and customer engineers on validation and deployment.
• Own validation sign-off for product releases against stability and performance targets.
• Review SoC and board designs for post-silicon considerations.
• Contribute to pre-silicon verification to improve bring-up efficiency.
• Build scripts and tooling to automate validation and data analysis.
• Advance post-silicon validation methodology and test coverage.

Skills

Cross-functional debugging

Python scripting

Bash scripting

System bring-up

Data analysis

Education

MS in Electrical Engineering / CS

Tools

PCIe

Ethernet

HBM

CXL/UCIe

Job description

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale. SambaNova Suite is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

The Post-Silicon Validation team brings up and validates the high-speed IO and memory subsystems inside SambaNova's DataScale platform, including PCIe, Ethernet, HBM, CXL, and UCIe interfaces. The team owns the path from first silicon power‑on through field deployment: characterization, stress testing, performance validation, and root‑causing issues that span silicon, board, and software. We work directly with design, firmware, verification, and system engineering to keep bring‑up on schedule and sign off on validation before product releases.

About the role SambaNova is seeking a Principal Engineer to own post‑silicon bring‑up, debug, and validation of high‑speed IO and memory subsystems within the DataScale platform. This role is central to delivering reliable, high‑performance AI systems at scale. You will lead system‑level debug across silicon, board, and software layers, driving issues to root cause from first silicon through field deployment. This is a hands‑on role for an engineer with deep expertise in high‑speed interfaces and hardware debug, who can operate in ambiguity and execute with high ownership.

Responsibilities

• Own post‑silicon bring‑up and validation of high‑speed IO and memory subsystems, spanning characterization, functional validation, stress testing, and performance analysis.
• Establish power‑on readiness ahead of first silicon, including debug infrastructure, tooling, and contingency planning.
• Lead system‑level debug to root cause complex issues spanning silicon, board, and software layers.
• Drive resolution with design, firmware, verification, and system teams to close issues and keep bring‑up on schedule.
• Partner with system and customer engineering teams on product validation, deployment, and RMA debug.
• Own validation sign‑off for product release against stability, performance, and field reliability targets.
• Review SoC and board design and SI/PI analysis through a post‑silicon debug and deployment lens.
• Contribute to pre‑silicon verification and emulation to improve bring‑up efficiency and coverage.
• Build scripts and tooling that automate validation, debug, and data analysis, and scale test coverage across systems.
• Advance post‑silicon validation methodology and debug infrastructure across programs.

Required Qualifications

• M.S. in Electrical Engineering, Computer Science, or a related field.
• 7+ years of experience in post‑silicon validation or system bring‑up.
• Experience with two or more high‑speed IO or memory protocols such as PCIe, Ethernet, HBM, CXL, or UCIe.
• Proven ability to lead cross‑functional debug efforts to root cause and closure.
• Strong analytical skills for test development and data analysis.
• Proficiency in scripting such as Python and bash.
• Clear and effective communicator with a proactive, collaborative approach to problem‑solving.

Preferred Qualifications

• Deep understanding of high‑speed SerDes training and adaptation.
• Experience with mixed‑signal IO design and validation.
• Hands‑on lab experience with oscilloscopes, protocol analyzers, and BERTs.
• Experience with optical interconnect.
• Ability to read and debug C/C++.

Base Salary Range: Base Pay Range $1 — $999,999 USD

EEO Policy

SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Benefits Summary for US-Based, Full-Time Employment Positions

• We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution.
• We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care.
• Our library of well‑being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.