Principal FPGA Architect & Tech Leader — Remote

Owl Cyber Defense; Danbury (CT); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Medical, dental, and vision coverage

401(k) retirement plan with company匹配

Paid time off

Life and disability insurance

Job summary

Owl Cyber Defense in Danbury, CT is seeking a Principal FPGA Engineer to lead FPGA architecture, system integration, and advanced hardware development for cybersecurity platforms. You will mentor teams, drive major initiatives, and contribute to long-term product strategy while collaborating with leadership on roadmaps and testing.

The role requires a minimum of 15 years FPGA/embedded systems experience, expertise in SystemVerilog, and strong leadership.

Qualifications

• Education as stated: EE/CE/CS degree or equivalent.
• 15+ years FPGA and embedded systems experience.

Responsibilities

• Lead FPGA architecture and system design initiatives.
• Drive advanced FPGA and embedded hardware development.
• Develop advanced FPGA packet handling mechanisms.
• Provide technical leadership for simulation and verification.
• Mentor across engineering teams.
• Support long-term product and technology strategy including roadmap and testing.
• Lead troubleshooting and performance optimization.

Skills

FPGA architecture

Packet processing

SystemVerilog

Leadership

Mentoring

Agile Scrum

Troubleshooting

Embedded systems

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science

15+ years FPGA and embedded systems experience

Tools

Xcellium

DVT linting

Xilinx/AMD Versal & Ultrascale+

Job description

Owl Cyber Defense in Danbury, CT is seeking a Principal FPGA Engineer to lead FPGA architecture, system integration, and advanced hardware development for cybersecurity platforms. You will mentor teams, drive major initiatives, and contribute to long-term product strategy while collaborating with leadership on roadmaps and testing.

The role requires a minimum of 15 years FPGA/embedded systems experience, expertise in SystemVerilog, and strong leadership.