Principal Engineer Signal Integrity Power Integrity

Global Foundries; Richardson (TX); On-site; USD 153,000 - 296,000; Full time

Job summary

GlobalFoundries in Richardson, TX is seeking a Principal Engineer, Signal Integrity & Power Integrity Leader to drive SI/PI strategy for custom silicon products and to define electrical architectures across die, package, and board.

You will mentor teams, lead vendor engagements with Cadence, Ansys, and other EDA tools, and work with SoC, package, and board groups to deliver first-pass silicon and robust electrical performance.

Qualifications

• Master's degree or higher in Electrical Engineering, Computer Engineering, Applied Physics, Electromagnetics, or related field.
• Minimum 10+ years of relevant semiconductor experience in Signal Integrity, Power Integrity, Electrical Design, Package Design, System Design, or Die-Package-Board Co-Design.
• Minimum 5+ years leading SI/PI activities for complex SoCs, ASICs, high-speed interfaces, HPC, or heterogeneous systems.
• Strong understanding of high-speed interfaces and system architectures including PCIe, Ethernet, DDR/LPDDR, SerDes, UCIe, USB, MIPI, networking, AI, and automotive platforms.
• Working knowledge of industry-standard EDA tools for package and board level simulations (Cadence Sigrity, Clarity, Ansys HFSS, SIwave, Q3D, Synopsys).
• Strong understanding of package technologies and manufacturing flows, reliability standards especially for automotive.

Responsibilities

• Lead SI/PI strategy for custom silicon products across industrial, automotive, AI, and networking applications.
• Drive SI/PI engagement and establish methodologies, guidelines, and signoff criteria for robust performance.
• Define electrical architecture and system-level requirements aligned with performance, power, cost, reliability, and manufacturability goals.
• Drive architecture for package power delivery, high-speed interfaces, board topologies, and channel implementations.
• Oversee die-package-board co-design including IO planning, bump assignment, floorplan optimization, and power delivery implementation.
• Collaborate with SoC Design, Package Design, Board/System Design, Validation, and customers to develop solutions.
• Lead validation strategies, characterization requirements, and device-level analysis for new products.
• Support compliance testing, silicon bring-up, and root-cause analysis to resolve performance issues.
• Mentor engineers and promote engineering best practices across hardware teams.
• Engage with customers, OSATs, foundries, and ecosystem suppliers to align roadmaps and achieve performance goals.

Skills

High-speed interfaces

Education

Master's degree or higher in Electrical Engineering or related field

10+ years semiconductor experience

Tools

Cadence Sigrity

Cadence Clarity

Ansys HFSS

SIwave

Q3D

Synopsys tools

Job description

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries make possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Introduction:

We are seeking a highly experienced Principal Engineer, Signal Integrity & Power Integrity Leader with strong experience in signal integrity, power integrity, die-package-board co-design, and system-level electrical architecture. This role requires deep expertise in high-speed interfaces, power delivery networks, advanced packaging technologies, and electrical performance optimization across silicon, package, and board domains.

Key Responsibilities:

• Lead SI/PI strategy for custom silicon products developed by MIPS covering industrial, automotive, AI, networking, and other end-equipment applications.
• Drive the overall signal integrity and power integrity engagement on these products and establish methodologies, design guidelines, and signoff criteria to ensure robust system performance and first-pass silicon success.
• Define electrical architecture and system-level requirements in alignment with product performance, power, cost, reliability, and manufacturability goals.
• Drive architecture definition for package power delivery networks, high-speed interfaces, board topologies, and channel implementations while serving as the technical authority for electrical design decisions.
• Drive die-package-board co-design and related engineering work on interface placement, IO planning, bump assignment, floorplan optimization, package routing, board stackup definition, and power delivery implementation to achieve optimal electrical performance across the complete system.
• Cross-collaboration and system-level leadership working closely with SoC Design, Package Design, Board/System Design, Validation, and customers to develop compelling and differentiated solutions.
• Strong understanding of electrical performance challenges, package and board level tradeoffs, compliance requirements, and a proven track record in driving technology and vendor engagements.
• Drive system-level analysis performing and guiding signal integrity (SI), power integrity (PI), electromagnetic (EM), channel compliance, and electrical performance simulations across die, package, and board environments.
• Drive signoff methodologies and design closure processes across multiple engineering disciplines.
• Validation and characterization leadership with the ability to define validation strategies and characterization requirements for new products.
• Support compliance testing, simulation-to-silicon correlation, silicon bring-up, and electrical root-cause analysis while driving resolution of product performance issues.
• Mentorship and leadership in providing technical guidance and mentorship to engineers across the hardware engineering organization.
• Lead technical initiatives, establish engineering best practices, align team direction with business and product priorities, and serve as the technical Subject Matter Expert (SME) for SI/PI and electrical co-design methodologies.
• Customer and vendor engagement leadership to drive technical alignment, discussions, and execution with customers, package vendors, PCB vendors, OSAT partners, and ecosystem suppliers.
• Drive customer discussions and align both internal product and technology roadmaps while supporting electrical architecture and system-level performance requirements.
• Stay current with the latest trends in signal integrity, power integrity, advanced packaging, chiplets, UCIe, power delivery architectures, AI/HPC platforms, and next-generation high-speed interconnect technologies.
• Drive design innovation, provide technical leadership and mentoring within the hardware engineering team, and participate in internal and external technical forums.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Master's degree or higher in Electrical Engineering, Computer Engineering, Applied Physics, Electromagnetics, or a related field.
• Minimum 10+ years of relevant semiconductor experience in Signal Integrity, Power Integrity, Electrical Design, Package Design, System Design, or Die-Package-Board Co-Design.
• Minimum 5+ years of demonstrated experience leading SI/PI activities for complex SoCs, ASICs, high-speed interfaces, high-performance computing platforms, or heterogeneous systems.
• Strong understanding of high-speed electrical interfaces and system architectures including PCIe, Ethernet, DDR/LPDDR, SerDes, UCIe, USB, MIPI, networking, AI, and automotive platforms.
• Working knowledge and understanding of industry-standard EDA tools for package and board level simulations such as Cadence Sigrity, Cadence Clarity, Ansys HFSS, SIwave, Q3D, Synopsys tools, and related SI/PI analysis environments.
• Understanding of package and board design environments is highly desirable.
• Strong understanding of package technologies including Flip-Chip, FCBGA, WLCSP, wire-bond, advanced packaging technologies, interposers, chiplets, 2.5D, and 3D integration, along with manufacturing flows, yield considerations, and reliability standards especially related to Automotive applications.
• Excellent communication and documentation skills capable of producing clear, comprehensive requirements, architecture specifications, design methodologies, validation plans, and customer-facing technical documentation for both internal and external stakeholders.
• Collaborative mindset comfortable working in global, cross-disciplinary teams and engaging directly with customers, partners, OSATs, foundries, and ecosystem suppliers.

Preferred Qualifications:

• Experience in ASIC or SoC development covering high-speed interfaces, networking, AI/ML, datacenter, automotive, mixed-signal, or HPC products is highly preferred.
• Experience engaging and driving package vendors, PCB vendors, OSAT partners, foundries, and ecosystem suppliers and exposure to advanced packaging roadmaps and semiconductor manufacturing ecosystems is highly preferred.
• Contributions to industry standards, technical conferences, patents, publications, or recognized technical leadership in signal integrity, power integrity, electrical architecture, high-speed interface design, or advanced packaging technologies are highly desired.
• Experience with advanced packaging technologies including chiplets, UCIe, HBM-based systems, 2.5D/3D integration, heterogeneous integration architectures, and next-generation high-bandwidth interconnect solutions is highly desirable.
• Experience developing and deploying enterprise-wide SI/PI methodologies, electrical signoff flows, and best practices across multiple product teams while driving performance closure across silicon, package, and board domains.

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Expected Salary Range$153,000.00 - $296,000.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential.

GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law