Principal Engineer, NPU Architect

Renesas Electronics; Austin (TX); Hybrid; USD 120,000 - 160,000; Full time

Benefits offered by this job

Flexible work environment

Career advancement opportunities

Diversity and inclusion programs

Job summary

A leading semiconductor solution provider in Austin, Texas, is looking for a Principal NPU Hardware Architect. The ideal candidate will have 10 to 15 years of experience in NPU hardware design, focusing on defining micro-architecture and ensuring hardware-software optimizations. Responsibilities include collaborating with software teams, designing high-bandwidth interconnects, and leading SoC infrastructure elements. This role offers a hybrid working model with opportunities for career advancement and a commitment to diversity and inclusion.

Qualifications

• 12+ years in AI accelerator, NPU, or GPU hardware architecture and RTL design.
• Ability to act as a technical authority and mentor junior designers.
• Proven track record with modern SoC protocols.

Responsibilities

• Define and own the end-to-end NPU micro-architecture.
• Partner with compiler and software teams for instruction sets.
• Lead the definition of SoC infrastructure elements.

Skills

NPU Architecture & Dataflow

Hardware-software co-design

Deep learning primitives

C++/SystemC modeling

System Integration

Education

Bachelor’s or Master’s in Electrical Engineering or Computer Engineering

Tools

SystemC

TLM

Job description

Job Description

We are looking for a Principal NPU Hardware Architect with 10 to 15 years of experience to drive the architectural definition and hardware implementation of high-performance Neural Processing Units (NPUs) targeted for microcontrollers and microprocessors addressing Automotive high performance compute. This is a hardware-oriented role that requires a deep understanding of the full silicon lifecycle, combined with a strong background in hardware-software co-design to ensure the NPU architecture is highly optimized for compiler-driven execution and software stacks.

Responsibilities

• NPU Architecture & Dataflow: Define and own the end-to-end NPU micro-architecture, including high-throughput tensor/matrix engines, vector units, and specialized activation functional units.
• Hardware-Software Co-Design: Partner closely with compiler and software teams to define instruction sets (ISA), memory management schemes, and hardware-aware graph optimizations.
• Virtualization & Multi-Tenancy: Architect hardware-assisted virtualization features to enable secure resource sharing and multi-tenant execution in cloud or edge environments.
• Interconnect & Fabric: Design and integrate high-bandwidth Bus fabrics (e.g., NoC, CHI) and DMA controllers optimized for the massive data movement inherent in AI workloads.
• Infrastructure & Power: Lead the definition of SoC infrastructure elements, including complex clock/reset domains and advanced power management strategies to maximize performance-per-watt.
• Performance Modeling: Develop bit-accurate and cycle-accurate C++/SystemC models to validate architectural choices and enable early software development.
• Full Design Flow: Oversee the transition from architectural spec to RTL, providing technical leadership through verification, physical design, and post-silicon bring‑up.

Qualifications

• Education: Bachelor’s or Master’s in Electrical Engineering or Computer Engineering (PhD desirable)
• Experience: 12+ years in AI accelerator, NPU, or GPU hardware architecture and RTL design.
• Domain Expertise: Deep knowledge of deep learning primitives (CNNs, Transformers, RNNs) and how they map to spatial compute hardware.
• Software Awareness: Strong understanding of compiler backends (e.g., LLVM, MLIR), IR transformations, and how hardware features like scratchpad memories or tiling impact compiler efficiency.
• System Integration: Proven track record with modern SoC protocols (AXI/ACE/CHI) and integrating NPU cores into larger system‑on‑chip environments.
• Modeling Skills: Expert-level proficiency in SystemC/TLM or C++ for architectural performance modeling and hardware-software co‑verification.
• Leadership: Ability to act as a technical authority, mentoring junior designers and influencing cross‑functional roadmaps.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system‑level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.

With a diverse team of over 22,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power‑efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’

At Renesas, You Can

• Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.
• Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure.
• Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people‑first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status or any other basis protected by federal, state or local law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual‑use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in‑office days are Tuesday through Thursday for innovation, collaboration and continuous learning.