Principal Design Engineer

Navitas Semiconductor

Torrance (CA)

On-site

USD 130,000 - 160,000

Full time

14 days+

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Job summary

Navitas Semiconductor is seeking a Principal Design Engineer in Torrance, CA, to design, implement, and verify advanced power ICs. Candidates should possess a Master’s degree and extensive experience in power management IC design.

The role involves evaluating trade-offs, optimizing device characteristics, and ensuring high-quality designs. Strong proficiency in EDA tools and excellent communication skills are essential.

Qualifications

  • 10+ years experience with a Master's, or 7+ years with a PhD.
  • Extensive experience in analog IC design in power supply.
  • Professionalism and accountability in interactions.

Responsibilities

  • Evaluate system-level trade-offs for power supply ICs.
  • Interface with engineers to define device characteristics.
  • Guide layout engineers for optimal physical design.
  • Tape out designs and validate results in the lab.

Skills

Knowledge of semiconductor device physics
Designing power ICs
Proficiency with EDA tools
DFT approaches
Excellent communication skills
Project management

Education

Master’s degree in electrical engineering
PhD in electrical engineering

Tools

Cadence Specter
Virtuoso XL

Job description

Job Description

Title: Principal Design Engineer (Principal Analog IC Designer)

Reports to: VP of IC Design

Location: In Office - Torrance, CA - Corporate Office

Employment Type: Exempt

Job Purpose

Navitas Semiconductor is a publicly traded MNC that creates the world's fastest integrated GaN Power ICs. Design Engineers will design, implement, and verify power IC through transistor level to top-level for a myriad of PMIC products.

Key Responsibilities And Duties
  • Evaluate system-level trade-offs for next generation power supply and identify IC architectures in collaboration with the system application team to meet performance requirements
  • Interface with characterization, modeling, and EDA design engineers to define and optimize device characteristics and simulation needs
  • Guide layout engineers on physical design
  • Review layouts and floorplan and provide feedback for optimal layout design
  • Tape out designs on schedule, adhering to required specifications
  • Evaluate and validate designs in the lab and identify any deviations from requirements and implement corrective actions
  • Any and all other duties, as assigned
Qualifications
  • Knowledge and strong understanding of semiconductor device physics, device safe-operating area, and power transistors used for high-frequency switching
  • Proven track record of designing power IC from concept phase to massive production
  • Strong proficiency with EDA tools (Cadence Specter, Virtuoso XL, Post Parasitic Extraction simulations, Monte Carlo Analysis, etc.)
  • Experience with DFT approaches and development of characterization and production test plans
  • Professionalism towards internal and external partners
  • Demonstrated ability to autonomously manage a myriad of demands and prioritize effectively
  • Excellent written and verbal communication skills
  • Maintains accountability for actions (ownership of work)
  • Extremely reliable and self-motivated with the ability to champion tasks
Requirements
  • Master’s degree in electrical engineering and 10+ years’ experience OR
  • PhD in electrical engineering and 7+ years’ experience
  • Extensive previous experience in chip design in the power supply field (Analog IC Design, Power Management IC, PMIC, AC-DC, AC-DC Controller, ACF, LLC, QR)
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