Principal Deep Learning Communication Architect

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 272,000 - 431,250; Full time

Benefits offered by this job

Competitive salary

Equity options

Generous benefits package

Job summary

NVIDIA Gruppe, located in Santa Clara, is seeking an expert with a Ph.D. or M.S. in Computer Science for a pivotal role in architecting communication libraries. This position offers an opportunity to influence the next generation of AI communication and networking technology.

The ideal candidate will have over 12 years of industry experience and deep technical skills in high-performance computing, as well as a keen understanding of NVIDIA's GPU architecture. Competitive salaries range from $272,000 to $431,250, alongside equity and benefits.

Qualifications

• 12+ years of industry experience in high-performance computing (HPC) or distributed deep learning.
• Deep understanding of 3D parallelism and advanced strategies.
• Experience with RDMA, RoCE, and low-level InfiniBand verbs.

Responsibilities

• Define the long-term technical roadmap for communication libraries.
• Lead the development of next-generation communication primitives.
• Collaborate with silicon architects to influence hardware specifications.

Skills

Parallelism Expertise

Technical Proficiency with communication libraries

Inference & Serving knowledge

GPU Architecture knowledge

Education

Ph.D. or M.S. in Computer Science, Electrical Engineering, or related field

Tools

NCCL

UCX

NVSHMEM

MPI

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

What You’ll Be Doing:

• Architecture Leadership: Define the long‑term technical roadmap for communication libraries across NVIDIA’s next‑generation platforms. You will ensure the seamless scaling of models to clusters comprising hundreds of thousands of nodes.
• AI Communication Library Design: Lead the development of next‑generation communication primitives and collective algorithms. This includes optimizing for heterogeneous interconnects such as NVLink, Spectrum‑X (Ethernet), and Quantum‑X (InfiniBand).
• Application‑Communication Library Co‑Design: Partner with application developers to architect and implement specialized communication primitives. You will ensure that AI and HPC libraries—including NCCL, NIXL, NVSHMEM, UCC, and UCX—evolve to meet the requirements of trillion‑parameter and Agentic AI.
• Hardware/Software Co‑Design: Collaborate with silicon architects and software engineers to influence hardware specifications for next‑generation networking, ensuring they meet the evolving demands of trillion‑parameter LLMs and Agentic AI.
• Quantitative Modeling: Develop high‑fidelity analytical models and simulators to predict system behavior under emerging workloads.

What We Need to See:

• Ph.D. or M.S. in Computer Science, Electrical Engineering, or a related field (or equivalent experience), with 12+ years of industry experience in high‑performance computing (HPC) or distributed deep learning.
• Parallelism Expertise: Deep understanding of 3D parallelism (Data, Tensor, Pipeline) and advanced strategies including Context Parallelism, Expert Parallelism, and Zero Redundancy Optimizer (ZeRO) variants.
• Technical Proficiency: Deep technical proficiency with NCCL, UCX, UCC, NVSHMEM, or MPI. Experience with RDMA, RoCE, and low‑level InfiniBand verbs is required.
• Inference & Serving: Advanced knowledge of high‑throughput inference engines and schedulers, specifically TensorRT‑LLM, vLLM, SGLang, and NVIDIA Dynamo.
• GPU Architecture: Expert knowledge of the NVIDIA GPU memory hierarchy (HBM3e/HBM4, L2 cache) and CUDA programming models.

Ways to Stand Out from the Crowd:

• Framework Development: Hands‑on experience developing within Megatron‑Core, DeepSpeed, or JAX/XLA, with an understanding of how these frameworks interact with low‑level communication runtimes is a plus.
• Significant upstream contributions to major open‑source projects (e.g., PyTorch Distributed, KServe, or Ray).
• A proven track record of deploying and optimizing models on NVIDIA platforms or similar rack‑scale systems.
• A strong portfolio of patents or papers in top‑tier systems/architecture venues (e.g., ISCA, ASPLOS, NeurIPS, SC).

Competitive salaries and a generous benefits package are offered. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 272,000 USD – 431,250 USD. You will also be eligible for equity and benefits.

Applications for this role will be accepted until April18,2026.

This posting is for an existing vacancy.

NVIDIA is committed to fostering a diverse work environment and is an equal‑opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.