Pre - Silicon Verification Engineer

Advanced Micro Devices, Inc.; California, San Jose (MO, CA); Hybrid; USD 90,000 - 130,000; Full time

Job summary

An innovative firm seeks a Pre-Silicon Verification Engineer to lead the verification of cutting-edge designs in high-speed technology. This role involves architecting and developing verification environments, ensuring first-pass silicon success, and mentoring junior engineers. The ideal candidate will have a strong background in UVM and System Verilog, along with excellent communication and leadership skills. Join a dynamic team where your contributions will help shape the future of computing and technology, making a significant impact in the industry.

Benefits

Employee Stock Purchase Plan

Annual bonus opportunities

Competitive benefits package

Qualifications

• Experience in developing UVM and System Verilog test benches.
• Strong understanding of verification techniques including assertion-based verification.

Responsibilities

• Lead verification of high-speed Crypto and Network-on-Chip designs.
• Collaborate with design teams to define verification strategies.

Skills

UVM

System Verilog

Simulation tools

Communication skills

Leadership skills

Education

BS in Electrical Engineering

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Synopsys VCS

Cadence Xcelium

VC Formal

JasperGold

Questa Formal

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

Adaptive and Embedded Computing Group (AECG) seeks a Pre- Silicon Verification Engineer to provide expertise in the verification of high-speed Crypto, Network-on-Chip (NoC), and cutting-edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success.

THE PERSON:

The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre-Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality.

KEY RESPONSIBILITIES:

• Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
• Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
• Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
• Develop and execute comprehensive verification plans, including testbenches and test cases.
• Collaborate with design, architecture, and software teams to define and implement verification strategies.
• Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
• Mentor and guide junior engineers, fostering a collaborative and innovative team environment

PREFERRED EXPERIENCE:

• Require experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium.
• Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs is a plus.
• Require familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management.
• Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus.
• Experience with gate-level simulation, power-aware verification is a plus.
• Experience with silicon debug at the tester and board level, is a plus.

ACADEMIC CREDENTIALS:

* Require BS or MS or PhD in Electrical Engineering, Computer Engineering or Computer Science.

LOCATION: San Jose, CA

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At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.