Pre-Silicon CPU Architecture & Platform Performance Lead

AMD; Austin (TX); On-site; USD 190,000 - 260,000; Full time

Job summary

AMD is seeking an engineer to build workload-relevant models of future AMD and competitor server platforms before silicon is available. You will convert disclosures, observed behavior, partner data and platform observations into explicit assumptions about future CPU designs, with uncertainty communicated clearly.

You will explain what a platform is likely to deliver on real workloads, why, and with what level of confidence, using performance counters and microbenchmarks to calibrate models and

Qualifications

• Deep hands-on experience in CPU microarchitecture, silicon performance, system architecture or performance modeling.
• Strong knowledge of out-of-order pipelines, branch prediction, fetch and decode, execution back ends and simultaneous multithreading behavior.
• Expertise in cache, TLB, coherence, prefetching, memory controllers, NUMA, bandwidth, latency and capacity scaling.
• Experience with hardware performance counters, profiling tools, microbenchmarks, system telemetry and bottleneck analysis.
• Strong quantitative and scripting or data-analysis skills used in performance investigations.
• Ability to reason from incomplete information, make assumptions explicit and show which unknowns can change the conclusion.
• Clear technical writing and visualization skills, with a commitment to configuration control, peer review and reproducibility.]

Responsibilities

• Develop comparative models of CPU front ends, execution resources, branch behavior, cache and TLB hierarchies, coherence, memory subsystems and multi-socket or NUMA behavior.
• Model platform constraints and advantages including memory bandwidth and capacity, DDR or HBM attachment where relevant, PCIe, CXL, networking, storage paths, power limits and thermals.
• Translate incomplete roadmap disclosures into explicit assumptions with confidence levels, alternate cases and sensitivity ranges.
• Use measured silicon, performance counters and platform telemetry to calibrate models and identify failing assumptions.
• Perform bottleneck decomposition that explains why a workload favors AMD or a competitor and which architectural mechanism is responsible.
• Work with workload engineers to create microbenchmarks and kernels that isolate high-value architectural effects.
• Evaluate ISA and acceleration features in the context of real application uplift rather than theoretical peak capability.
• Quantify performance-per-watt, platform power and rack-density implications when architectural choices change system behavior.
• Maintain version-controlled assumptions, sources, revisions and uncertainty so forecasts can be peer reviewed and reproduced.
• Create architecture diagrams, technical narratives and executive-ready content that clearly show causes, risks and areas of AMD advantage.

Skills

CPU microarchitecture

silicon performance

system architecture

performance modeling

hardware counters

profiling tools

data analysis

scripting

quantitative skills

Tools

Profiling tools

Microbenchmarks

System telemetry

Job description

AMD is seeking an engineer to build workload-relevant models of future AMD and competitor server platforms before silicon is available. You will convert disclosures, observed behavior, partner data and platform observations into explicit assumptions about future CPU designs, with uncertainty communicated clearly.

You will explain what a platform is likely to deliver on real workloads, why, and with what level of confidence, using performance counters and microbenchmarks to calibrate models and