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Etched.ai, Inc. is searching for a Power Systems Design Engineer in San Jose to develop advanced power solutions for high-power processors. The role involves designing power supply solutions, working with vendors, conducting PCB IR drop analysis, and ensuring optimal power delivery. Ideal candidates will have at least 8 years of experience in power supply design, particularly multi-phase power solutions and 48V input conversion, along with a Bachelor's degree in Electrical Engineering.
Company benefits include comprehensive medical packages, a housing subsidy, and relocation support for new employees moving to San Jose.
Etched is building AI chips that are hard‑coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real‑time video generation models and extremely deep chain‑of‑thought reasoning.
We are seeking a Power Systems Design Engineer to join our team and contribute to the development of advanced power solutions for high‑power processors. As a Power Systems Design Engineer at Etched, you will be pivotal in designing, selecting, and qualifying power supply solutions to meet extremely high power demands for processors. You will work closely with power supply vendors and leverage your expertise in multi‑phase power solutions, 48V input conversion, and power loss analysis to ensure optimal performance and reliability. Your role will also involve helping with large BGA (Ball Grid Array) power development and conducting thorough PCB IR drop and power loss simulations.
We encourage you to apply even if you do not believe you meet every single qualification.
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model‑specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single‑model ASICs.
We are a fully in‑person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.