Power Engineer

Wipro; Sunnyvale (CA); On-site; USD 60,000 - 140,000; Full time

Benefits offered by this job

Medical and dental benefits

Disability insurance

Paid time off (sick leave included)

Other paid and unpaid leave

Job summary

Wipro Limited in Sunnyvale, CA, seeks an experienced SoC power-analysis engineer to own power flows from RTL to gate level. You will build and maintain in-house Python/Tcl wrappers around Synopsys PrimePower, PrimeTime PX, and related tools, and support design teams’ power runs.

The role covers running large-scale power studies, deriving metrics, ensuring regression suites pass, and delivering power data via dashboards.

Qualifications

• 8+ years in SoC power analysis
• Hands-on gate-level power analysis with PrimePower or PrimeTime PX
• RTL power estimation with PrimePower RTL/RTL Architect/Cadence Joules
• UPF/power domains/multi-voltage awareness
• Linux, shells, and version control for production tools

Responsibilities

• Develop, maintain and release in-house Python/Tcl wrappers for power tools
• Own release cycle: notes, guides, and tutorials; provide user support
• Maintain nightly regression suites and add tests for fixes
• Support power runs: set up inputs, debug runs, assess trust in results
• Run large power studies and derive metrics (energy/benchmarking)
• Identify root causes; work with vendors and R&D
• Produce power data for dashboards and reports
• Build AI-agent automation to monitor runs and file bugs

Skills

Power analysis experience

Python

Tcl scripting

Linux/compute farms

Problem analysis/communication

Tools

PrimePower/PrimeTime PX

RTL Architect

Cadence Joules

Job description

Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com.

Job Description

About the role

You will own the power-analysis flows that a large silicon team uses to estimate and sign off power on its SoCs, from RTL to gate level. You will develop and release in-house tools built around Synopsys power tools, support the design teams that run them, carry out power studies on full-chip designs, and work with Synopsys on tool issues. The team also uses AI agents to launch runs, debug failures and write reports, and you will maintain and extend them.

Responsibilities

• Develop, maintain and release in-house Python and Tcl wrappers around Synopsys PrimePower, PrimeTime PX, PrimePower RTL and RTL Architect, covering gate-level power (averaged, time-based, glitch and vectorless) and RTL power.
• Own the release cycle: versioned releases, release notes, user guides and tutorials, fixes to released versions, and user support in internal Q&A forums.
• Keep the nightly regression suites passing on reference designs across process nodes, and add a test for every fix.
• Support design teams’ power runs: set up inputs (netlist, SDC, SPEF, UPF, libraries, activity files), debug failed runs, and judge whether results can be trusted (annotation coverage, choice of activity window, comparison with earlier design milestones).
• Run power studies on large designs, for example a campaign of more than 100 tests on a full-chip network-on-chip. Derive metrics such as energy per byte, per-block and per-power-domain attribution, clock-gating efficiency, and glitch and leakage breakdowns.
• Find the root cause of tool, library and flow problems, such as memory power rails, power-switch definitions and PDK updates. Build small testcases and work with Synopsys support and R&D.
• Produce power data for others: power-tracker spreadsheets, dashboards, and power maps for thermal and IR-drop tools.
• Build and maintain AI-agent automation for the power team: launching and monitoring runs, analysing failures, checking inputs before expensive runs, and filing bugs automatically.

Required

• 8+ years in SoC power analysis or low-power methodology, including 3+ years building flows that other engineers use.
• Hands-on gate-level power analysis with PrimePower or PrimeTime PX: averaged and time-based modes, FSDB and SAIF annotation, glitch power and vectorless analysis.
• RTL power estimation with PrimePower RTL, RTL Architect or an equivalent tool (for example Cadence Joules).
• Low-power design: UPF, power domains and switches, isolation and retention, clock gating, multiple voltages, memory power states.
• Strong Python, as used in production tools that many engineers depend on (command-line tools, YAML and template-driven configuration, tests, code review).
• Tcl in Synopsys shells, plus csh and bash.
• Working knowledge of implementation data: Liberty libraries, netlists, SDC, SPEF and UPF from synthesis and place-and-route.
• Ability to trace a problem from logs and reports to its root cause, and to explain power results clearly to designers and architects.
• Linux, compute farms (LSF or similar), version control and code review.

Mandatory Skills: VLSI Physical Place and Route.Experience: 3-5 Years.

The expected compensation for this role ranges from $60,000 to $140,000 .Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience.

Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.

• medical and dental benefits options
• disability insurance
• paid time off (inclusive of sick leave)
• other paid and unpaid leave options

Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.

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