Power Engineer

Socket.dev

Cupertino (CA)

On-site

USD 161,000 - 225,000

Full time

7 days ago
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Benefits offered by this job

Stock programs
Discretionary bonuses
Relocation assistance
Education reimbursement

Job summary

Apple Inc. in Cupertino, CA seeks a Power Modeling Engineer to develop energy models and perform early power estimation, collaborating with micro-architecture teams to improve efficiency without compromising performance.

The role involves RTL power analysis, data visualization, and validating power reductions across a broad PPA space, with opportunities for growth and relocation support.

Qualifications

  • Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field.
  • Experience with Python to automate data collection and insights.
  • Experience with RTL power analysis and reduction.
  • Knowledge of computer architecture to optimize performance, power and area.

Responsibilities

  • Develop energy models for power targets and early power estimation.
  • Collaborate with micro-architecture teams on design implementations for better power efficiency.
  • Validate power reduction changes in a comprehensive PPA space.
  • Instrument RTL and test benches to extract key energy metrics.

Skills

Python
Machine learning
Power analysis
RTL power analysis

Education

Master's degree in Electrical/Computer Engineering

Tools

VHDL
Verilog
FPGA CAD tools

Job description

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Develop energy models for power targets, “What-if” analysis and early power estimation. Collaborate with the micro-architecture teams on design implementations to obtain better power efficiency without compromising performance. Work with designers on RTL (Register Transfer Level) power analysis and reduction. Validate power reduction changes in a comprehensive power, performance and area (PPA) space. Support various gate-level power rollup and analysis. Develop heuristics to accelerate power analysis on larger power data set. Develop power data visualization platform to extract power optimization insights. Instrument RTL and test benches to extract key energy metrics and counts. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $160,803 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field. Education and/or experience must include: Utilizing Python to automate power data collection and extracting power optimization insightsUtilizing HTML and OOP programing languages to create power data visualization platformUtilizing mathematical methods to analyze power data to expose power inefficienciesUtilizing logic analyzer tools to inspect design waveform and validate power reduction changes.Utilizing machine learning methods to accelerate feature extraction from large datasetsUtilizing knowledge of computer architecture to optimize design in the space of performance, power and areaUtilizing VHDL or Verilog to realize microprocessor functionalities including, but not limited to datapath, instruction control, and cache hierarchies.Utilizing FPGA and CAD tools to build silicon prototype of large digital systems

Preferred Qualifications

NA

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