Power Delivery & Integrity Engineer - Los Altos

Majestic Labs ai; Los Altos (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Majestic Labs is seeking a Senior Power Engineer to lead board- and rack-level power delivery for next-gen AI servers. You will define voltage conversion strategies, PDN topology, and decoupling schemes to maximize efficiency and thermal performance while ensuring OCP/Open Rack compatibility.

You will collaborate across silicon, mechanical, thermal, and systems teams, develop test plans, and drive design tradeoffs to ensure robust, scalable power for complex platforms.

Qualifications

• BS/MS in Electrical Engineering or related field.
• 10+ years in high-power delivery design for SoCs.
• Deep expertise in PDN and impedance control for high-current systems.
• Proficiency with SPICE and PDN simulation tools; hands-on measurement experience.
• Strong cross-functional collaboration and communication skills.

Responsibilities

• Architect board-, server-, and rack-level power delivery systems for high-power subsystems.
• Define PDN topology with VRMs, POLs, and high-current interfaces.
• Select components and create derating, margin, and reliability guidelines.
• Lead decoupling capacitor strategy across package/PCB to meet impedance goals.
• Drive power integrity analyses and validate designs via models and lab tests.
• Collaborate with mechanical/thermal teams to meet cooling and routing constraints.
• Co-design vertical PDN paths with silicon and package teams; advise silicon design.
• Develop PDN test plans for validation and bring-up.
• Provide root-cause analysis and corrective actions for power issues.

Skills

High-power design

Power integrity

PDN modeling

VRM design

Transient response optimization

Cross-functional collaboration

Education

Bachelor's/Master's in Electrical Engineering

Tools

SPICE

Keysight

Cadence Sigrity/Clarity

Ansys SIwave

Oscilloscopes

VNAs

Job description

About Majestic Labs

We're a fast-moving, US-Israeli AI startup building next-generation infrastructure for the world’s most demanding AI workloads. Our mission is to accelerate the future of intelligence and make it ubiquitously accessible by delivering full stack custom AI servers optimized for large-scale inference and training.

About Majestic Labs

We're a fast-moving, US-Israeli AI startup building next-generation infrastructure for the world’s most demanding AI workloads. Our mission is to accelerate the future of intelligence and make it ubiquitously accessible by delivering full stack custom AI servers optimized for large-scale inference and training.

Backed by top-tier investors and led by industry veterans, we're scaling rapidly. We seek forward-thinking engineers and operators who thrive in a collaborative environment and excel at solving complex challenges from first principles. If you want to build infrastructure that fundamentally changes what the world can accomplish with AI, come join us!

About The Position

We are seeking a highly skilled Senior Power Engineer to take a leadership role in defining the board-level and rack-level power delivery architecture for our next-generation, multi-kilowatt AI server platforms. This critical position owns the end-to-end design of high-current power delivery paths to advanced SoCs, encompassing the definition of voltage conversion and regulator strategy, comprehensive Power Delivery Network design including efficient decoupling schemes, and driving critical design tradeoffs to maximize efficiency, optimize thermal performance, and ensure overall system performance, all while considering compatibility with OCP/Open Rack power distribution standards. You will work cross-functionally with silicon, mechanical, thermal, and systems engineers to deliver robust, efficient, and scalable power delivery for these complex platforms.

Responsibilities

• Architect and design board-level, server-level, and rack-level power delivery systems for high-power subsystems.
• Define PDN topology, including VRMs, POLs, vertical and lateral power routing, and high-current interfaces.
• Perform component selection (VRMs, FETs, inductors, bulk caps, MLCCs, connectors, busbars) and create derating, margin, and reliability guidelines.
• Lead decoupling capacitor strategy across package and PCB layers to meet target impedance and transient response goals.
• Drive power integrity analysis (AC/DC, Z-target, transient, EMI/EMC) and validate designs through modeling, simulation, and lab measurement.
• Collaborate with mechanical and thermal teams to ensure high-current routing, cooling requirements, and system constraints are aligned.
• Partner with silicon and package engineering to co-design vertical PDN paths, including socket interfaces, pin/bump maps, and transient load profiles. Review and advise silicon design to improve power integrity.
• Develop test plans for PDN validation, transient load tests, impedance measurement, and system bring-up.
• Provide expertise during failure analysis, root-cause investigations, and corrective actions for system power issues.

Requirements

• BS/MS in Electrical Engineering or related field.
• 10+ years of experience in high-power delivery design.
• Demonstrated experience designing high-current, low-voltage power delivery for SoCs.
• Deep expertise in power integrity, PDN modeling, VRM design, target impedance definition, and transient response optimization.
• Proficiency with SPICE, PDN simulation tools (Keysight, Cadence Sigrity/Clarity, Ansys SIwave), and measurement equipment (VNAs, oscilloscopes, electronic loads).
• Solid understanding of package-to-PCB PDN interactions.
• Strong communication and cross-functional collaboration skills.

Preferred Qualifications

• Familiarity with EMI/EMC mitigation in high-current environments.
• Experience in server-class PCB design, including stackup planning, high-current routing, and decoupling strategies
• Background in thermal-mechanical co-design for high-power modules.
• Knowledge of rack-level power architectures, ORv3/OCP standards, power shelves, and busbar system

We seek smart, curious, self-driven individuals who enjoy creative problem-solving and continuous learning. Even if you don't meet all requirements, we'd love to hear from you if you have the mindset to tackle complex challenges.

Majestic Labs is an equal opportunity employer deeply committed to diversity of background and thought. If you are ready to dare greatly, learn from mistakes, engage in vigorous debates, and help create a step-function shift in human technical capability, we want to meet you!