PMIC Engineering Program Manager

Apple; Cupertino (CA); On-site; USD 190,000 - 230,000; Full time

Job summary

Apple seeks a Silicon Program Manager to drive PMIC development from architecture through mass production. You will own full silicon lifecycles for custom power management ICs and coordinate cross‑functional teams to meet aggressive schedules.

You will lead technical discussions on architectures, tradeoffs, and performance, and interface with suppliers and design partners to resolve complex challenges across multiple teams.

Qualifications

• BS degree in a technical discipline with 10+ years of relevant experience.
• Proven experience in SOC/VLSI chip design, ASIC chip design, or power management chip design.

Responsibilities

• Lead silicon lifecycles from architecture through mass production for PMICs.
• Coordinate cross‑functional teams across design, verification, validation, technology, hardware, and software.
• Manage issue resolution, risks, and status communications with suppliers and partners.

Skills

SOC/VLSI design

ASIC design

Power management

Program management

Education

BS degree

Job description

Summary

Apple's Power Management solutions enable the exceptional performance and battery life in every Apple product from iPhone to Mac to Watch. We're seeking a Silicon Program Manager to drive PMIC development from architecture through mass production, combining program leadership with deep technical engagement.

Description

In this individual contributor role, you'll own full silicon lifecycles for custom Power Management ICs. You'll coordinate cross-functional teams spanning silicon design, systems architecture, product engineering, and operations to deliver on aggressive schedules while resolving complex technical challenges. You'll lead technical discussions on power management architectures, evaluate design tradeoffs (efficiency, area, performance), and dive deep into technical challenges to influence the solutions across multiple teams and stakeholders.

Key Responsibilities

Work on a program management team responsible for driving technical issue resolution to deliver state‑of‑the‑art silicon against demanding product schedules. Drive internal program processes to ensure high‑quality silicon definition and design execution for battery and power management silicon. Support high‑level execution as part of a dynamic core technology design team. Drive silicon issues to resolution while interfacing with multi‑functional teams—Design, Verification, Validation, Technology, System Hardware, and Core Software. Ensure design teams stay focused on near‑term milestones by pulling together the right cross‑functional expertise to unblock technical issues through data‑driven decision‑making. Attend and lead technical sessions with suppliers and design partners to track and follow up on critical issues. Own focused issue reporting, bug tracking, and communication of program risks and status.

Minimum Qualifications

BS Degree in technical discipline and 10+ years of relevant experience . Proven experience in SOC/VLSI Chip Design, ASIC Chip Design, Power Management Chip design or Technology process development.

Preferred Qualifications

Work on a program management team responsible for driving technical issue resolution to deliver state‑of‑the‑art silicon against demanding product schedules. Drive internal program processes to ensure high‑quality silicon definition and design execution for battery and power management silicon. Support high‑level execution as part of a dynamic core technology design team. Drive silicon issues to resolution while interfacing with multi‑functional teams—Design, Verification, Validation, Technology, System Hardware, and Core Software. Ensure design teams stay focused on near‑term milestones by pulling together the right cross‑functional expertise to unblock technical issues through data‑driven decision‑making. Attend and lead technical sessions with suppliers and design partners to track and follow up on critical issues. Own focused issue reporting, bug tracking, and communication of program risks and status.