PIC Test Manager

Langham Recruitment; San Francisco (CA); Hybrid; USD 250,000 - 260,000; Full time

Job summary

A leading technology recruitment firm is seeking a Senior PIC Test Manager to define and own the wafer-level test strategy for photonic integrated circuits. This role requires over 10 years of experience in PIC test engineering, along with in-depth knowledge of optical probing and yield learning. As part of this position, you will collaborate with foundries to transition robust test flows into high-volume manufacturing, ensuring the successful scaling of advanced photonic technologies. This opportunity will have a direct impact on the manufacturing process.

Qualifications

• 10+ years of experience in PIC test engineering, wafer-level probing, or photonics manufacturing test.
• Demonstrated ownership of wafer-level optical and electrical test from R&D through high-volume manufacturing.
• Deep expertise in wafer-level optical probing, yield learning, and foundry engagement.

Responsibilities

• Own and define wafer-level PIC test strategy across multiple product lines through high-volume manufacturing.
• Design scalable, high-throughput optical and electrical wafer probing solutions.
• Drive yield learning through parametric analysis, wafer maps, and statistical techniques.

Skills

Wafer-level optical probing

Yield learning

Spatial analytics

Foundry engagement

Job description

Full-Time | Hybrid | $250K–$260K + Equity + Benefits

We are looking for a senior PIC Test Manager with strong expertise in wafer-level optical and electrical testing for Photonic Integrated Circuits (PICs).

This position owns the wafer-level test strategy across the entire product lifecycle—from initial silicon bring-up through high-volume manufacturing (HVM). You will drive test architecture, yield learning, and manufacturing readiness while working closely with design, process integration, foundry, and OSAT partners to scale advanced photonic technologies into production.

What You’ll Do

• Own and define wafer-level PIC test strategy across multiple product lines through HVM
• Design scalable, high-throughput optical and electrical wafer probing solutions
• Lead first-silicon bring-up, including defining test content, setting limits, and performing characterization
• Drive yield learning through parametric analysis, wafer maps, and statistical techniques
• Influence PIC Design-for-Test (DFT) and PDK structures to enhance manufacturability and test scalability
• Collaborate with foundries and OSATs to qualify wafer-level optical probe infrastructure
• Transition robust test flows into high-volume manufacturing environments
• Serve as the technical escalation point for yield or manufacturing issues
• Mentor senior engineers and establish best practices for wafer-level test programs

What We’re Looking For

• 10+ years of experience in PIC test engineering, wafer-level probing, or photonics manufacturing test
• Demonstrated ownership of wafer-level optical and electrical test from R&D through HVM
• Deep expertise in:
• Wafer-level optical probing
• Yield learning and spatial analytics
• Foundry engagement and factory transfer
• Preferred experience influencing PIC DFT and partnering with PDK development teams
• Background in high-volume semiconductor or photonics manufacturing environments

Why You’ll Love Working With Us

• High-level technical ownership with direct impact on manufacturing
• Opportunity to shape how next-generation PICs are tested and brought to scale in production