Ph.D. Intern – AI/ML, Design Automation

Jobtailor

Arizona

On-site

USD 120,000 - 180,000

Full time

9 days ago
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

Marvell is seeking a PhD-focused machine learning researcher to tackle design-automation challenges in cutting-edge silicon development. You will develop ML models for placement, routing, and timing, leveraging graph neural networks, reinforcement learning, and generative approaches.

You will work with Cadence/Synopsys flows and real data from 3nm/2nm tapeouts, iterating toward first-pass silicon success. You will build LLM-based tools and RAG pipelines, evaluate model performance, and

Qualifications

  • PhD candidate in CS/EE/Data Science or related field with ML focus.
  • Hands-on experience building and deploying ML systems.
  • Applied experience training, evaluating, and deploying ML models using PyTorch or TensorFlow.
  • Production-quality Python.
  • Familiarity with Git and software development best practices.
  • Rigorous experimental methodology and ability to measure results and draw defensible conclusions from data.
  • Ability to communicate technical work clearly to research and engineering audiences.
  • Track 1: Coursework or research in VLSI design, digital/analog circuit design, or EDA.
  • Track 1: Familiarity with graph-based ML methods, RL, or generative models for structured engineering data.
  • Track 1: Exposure to EDA tools such as Cadence or Synopsys.
  • Track 2: Experience with LLMs, multimodal models, RAG pipelines, and agentic protocols (MCP, A2A).
  • Track 2: Knowledge of transformers, diffusion models, and orchestration tools (LangChain, LangGraph, AutoGen, CrewAI, LlamaIndex, Hugging Face).
  • Track 2: Model benchmarking and evaluating, including failure modes and enhancements.
  • Track 2: End-to-end data pipeline development and deployment with data engineering teams.

Responsibilities

  • Apply machine learning research to real chip design problems across Marvell's advanced silicon development flow.
  • Develop and apply ML models, including graph neural networks, reinforcement learning, and generative approaches, to placement, routing, timing closure, power estimation, and design rule checking.
  • Work with production EDA tool flows and real design data from active tapeouts in 3nm and 2nm processes.
  • Build predictive models to reduce design iteration cycles and improve first-pass silicon success rates.
  • Collaborate with analog, digital, and physical design engineers and validate model outputs against ground-truth silicon results.
  • Present research findings and model performance to engineering leadership and contribute to internal technical documentation.
  • Design, implement, and evaluate LLM-based tools and agentic workflows for global engineering and operations teams.
  • Build RAG pipelines, fine-tuning workflows, and prompt engineering frameworks using Marvell's internal knowledge and tooling ecosystem.
  • Evaluate model performance, safety, and reliability in production enterprise environments and iterate based on engineering-team feedback.
  • Collaborate with IT, security, and engineering stakeholders on responsible and scalable AI deployment.
  • Present implementation results and adoption metrics to cross-functional leadership.

Skills

Machine Learning
Graph Neural Networks
Reinforcement Learning
Generative Models
Python
PyTorch
TensorFlow
Model Evaluation
Git
Communication

Education

PhD candidate in CS/EE/Data Science or related

Tools

Cadence
Synopsys
LangChain
Hugging Face
AutoGen
CrewAI
LlamaIndex
N8n
MCP
A2A

Job description

  • Apply machine learning research to real chip design problems across Marvell's advanced silicon development flow
  • Develop and apply ML models, including graph neural networks, reinforcement learning, and generative approaches, to placement, routing, timing closure, power estimation, and design rule checking
  • Work with production EDA tool flows and real design data from active tapeouts in 3nm and 2nm processes
  • Build predictive models to reduce design iteration cycles and improve first-pass silicon success rates
  • Collaborate with analog, digital, and physical design engineers and validate model outputs against ground-truth silicon results
  • Present research findings and model performance to engineering leadership and contribute to internal technical documentation
  • Design, implement, and evaluate LLM-based tools and agentic workflows for global engineering and operations teams
  • Build RAG pipelines, fine-tuning workflows, and prompt engineering frameworks using Marvell's internal knowledge and tooling ecosystem
  • Evaluate model performance, safety, and reliability in production enterprise environments and iterate based on engineering-team feedback
  • Collaborate with IT, security, and engineering stakeholders on responsible and scalable AI deployment
  • Present implementation results and adoption metrics to cross-functional leadership
Requirements
  • Currently enrolled in a Ph.D. program in Computer Science, Electrical Engineering, Data Science, or a related field, with a research focus in machine learning, AI systems, or a related area
  • Hands-on experience building and deploying machine learning systems
  • Applied experience training, evaluating, and deploying ML models using frameworks such as PyTorch or TensorFlow
  • Production-quality Python
  • Familiarity with Git and software development best practices
  • Rigorous experimental methodology and ability to measure results and draw defensible conclusions from data
  • Ability to communicate technical work clearly to research and engineering audiences and present and defend work
  • Track 1: Coursework or research experience in VLSI design, digital or analog circuit design, computer architecture, or EDA
  • Track 1: Familiarity with graph-based ML methods, reinforcement learning, or generative models applied to structured engineering data
  • Track 1: Exposure to EDA tools or chip design flows such as Cadence or Synopsys is a strong plus
  • Track 2: Demonstrated full-stack experience with LLMs, multimodal models, RAG pipelines, and agentic protocols such as MCP and A2A
  • Track 2: Hands-on knowledge of transformers, diffusion models, and orchestration tools such as LangChain, LangGraph, AutoGen, CrewAI, LlamaIndex, or Hugging Face
  • Track 2: Rigorous model benchmarking and evaluation, including identifying failure modes and proposing enhancements
  • Track 2 preferred: Experience with agentic reasoning, planning, and tool-use patterns in multi-agent orchestration frameworks such as n8n or AutoGen
  • Track 2 preferred: Exposure to end-to-end data pipeline development and model deployment with data engineering or platform teams
  • Track 2 preferred: Ability to independently research and implement concepts from current AI literature
  • Applicants must be eligible to access export-controlled information under U.S. export control laws; some applicants may require export license review
Core Competencies

Demonstrates expertise in machine learning model development and deployment, particularly in the context of chip design and EDA tools. Proficient in Python programming and familiar with frameworks such as PyTorch and TensorFlow, with a strong emphasis on collaboration and communication within cross-functional teams.

Highest-signal resume keywords
  • Machine Learning Model Development
  • Python Programming
  • Graph Neural Networks
  • EDA Tool Experience
  • Reinforcement Learning
Hard Skills
  • Machine Learning
  • Graph Neural Networks
  • Reinforcement Learning
  • Generative Models
  • Python
  • PyTorch
  • TensorFlow
  • EDA Tools
  • VLSI Design
  • Model Evaluation
Soft Skills
  • Communication
  • Collaboration
  • Problem-Solving
  • Research Skills
  • Presentation Skills
Industry Keywords
  • Chip Design
  • Silicon Development
  • EDA
  • AI Systems
  • Export Control Laws
Tools & Technologies
  • Cadence
  • Synopsys
  • LangChain
  • Hugging Face
  • AutoGen
  • CrewAI
  • LlamaIndex
  • N8n
  • MCP
  • A2A
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Sr. Staff AI Engineer, Silicon Design
Sr. Staff AI Engineer, Silicon Design

Cognichip • Redwood City (CA)

On-site
USD 150,000 - 200,000
Applied AI Engineer
Applied AI Engineer

Silimate (YC S23) • Mountain View (CA)

On-site
USD 180,000 - 260,000
Salary + equity
Health/vision/dental/401k
Team meals
Applied Researcher I – AI Foundations, VLM
Applied Researcher I – AI Foundations, VLM

Jobtailor • California (MO)

On-site
USD 180,000 - 240,000
Applied AI Engineer
Applied AI Engineer

Silimate (YC S23) • San Francisco (CA)

On-site
USD 180,000 - 260,000
Equity (generous)
Health/vision/dental/401k benefits
Team meals
Machine Learning Engineer, AI Inference Solutions – Early Career
Machine Learning Engineer, AI Inference Solutions – Early Career

Jobtailor • Sunnyvale (CA)

On-site
USD 110,000 - 160,000
Principal AI Forward Deployment Engineer
Principal AI Forward Deployment Engineer

Cadence • Oregon

On-site
USD 130,000 - 160,000
Staff AI/ML Software Engineer, Model Distillation, Fine-Tuning
Staff AI/ML Software Engineer, Model Distillation, Fine-Tuning

Jobtailor • California (MO)

Hybrid
USD 180,000 - 260,000
Lead Machine Learning Engineer, Python, AWS, SQL, GenAI
Lead Machine Learning Engineer, Python, AWS, SQL, GenAI

Jobtailor • New York (NY)

On-site
USD 140,000 - 210,000
PhD Intern: AI/ML for Chip Design & EDA Automation
PhD Intern: AI/ML for Chip Design & EDA Automation

Jobtailor • Arizona

On-site
USD 120,000 - 180,000
Principal AI Forward Deployment Engineer
Principal AI Forward Deployment Engineer

Cadence • Cary (NC)

On-site
USD 180,000 - 280,000