Performance Modeling Engineer

Oho Group; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Oho Group in San Francisco seeks a senior performance-modeling engineer to build analytical and simulation-based models that guide architectural decisions for AI workloads before hardware exists.

Your work will span processors, accelerators, memory hierarchies and interconnects, analyzing transformer inference across single-device and multi-accelerator systems, and evaluating latency, throughput, energy and cost trade-offs.

Qualifications

• Strong Python and/or C++ development.
• Experience building performance models.
• Deep computer-architecture and microarchitecture knowledge.
• Understanding of compute pipelines, memory systems and data movement.
• Ability to convert model results into concrete architecture decisions.

Responsibilities

• Build analytical and simulation-based performance models.
• Model processors, accelerators, memory hierarchies and interconnects.
• Analyze transformer inference across single-device and multi-accelerator systems.
• Evaluate latency, throughput, utilization, energy and cost trade-offs.
• Characterize workload behavior using traces and representative benchmarks.
• Identify architectural bottlenecks and propose measurable improvements.
• Partner with hardware, compiler, runtime and inference teams.
• Correlate models against simulation, emulation or silicon as the platform matures.

Skills

Python

C++

Performance modeling

Computer architecture

Job description

We’re working with a semiconductor company designing a new programmable compute architecture for demanding AI workloads.

They’re looking for a senior performance-modeling engineer to create the tools that guide architectural decisions before hardware exists. Your work will determine where performance is gained or lost across compute, memory, interconnect and complete AI systems.

What you’ll work on

• Build analytical and simulation-based performance models
• Model processors, accelerators, memory hierarchies and interconnects
• Analyze transformer inference across single-device and multi-accelerator systems
• Evaluate latency, throughput, utilization, energy and cost trade-offs
• Characterize workload behavior using traces and representative benchmarks
• Identify architectural bottlenecks and propose measurable improvements
• Partner with hardware, compiler, runtime and inference teams
• Correlate models against simulation, emulation or silicon as the platform matures

What we’re looking for

• Strong Python and/or C++ development
• Experience building performance models
• Deep computer-architecture and microarchitecture knowledge
• Understanding of compute pipelines, memory systems and data movement
• Ability to convert model results into concrete architecture decisions

Experience with GPUs, AI accelerators, LLM inference, cluster modelling, roofline analysis, NoCs or cost-per-token analysis would be especially relevant.

This is an architecture-shaping role where performance models influence both the silicon and the software designed around it.