Performance Co-Design Engineer, Google Cloud TPU

Google LLC; Sunnyvale (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google LLC in Sunnyvale, CA is hiring a Performance Co-Design Engineer for Google Cloud TPU. You will shape AI/ML hardware acceleration, drive TPU architecture and integration with ML systems, and collaborate across hardware designers, software architects, and ML researchers.

The role emphasizes end-to-end design and verification of TPU components, working within Google’s AI and Infrastructure teams to deliver high-performance, power-efficient accelerators for cutting-edge models.

Qualifications

• Bachelor's degree or equivalent experience in EE/CE/CS or related field.
• 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

Responsibilities

• Define and optimize the hardware/software stack for performant training and serving of large ML models.
• Collaborate with research and modeling teams to drive architectural innovations for ML workloads.
• Lead development of configurable architectural simulators and cycle-accurate performance models.

Skills

Computer architecture

Chip architecture

Hardware-software co-design

Performance modeling

System analysis

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Tools

TensorFlow

PyTorch

Job description

Performance Co-Design Engineer, Google Cloud TPU

Share Performance Co-Design Engineer, Google Cloud TPU

Google Sunnyvale, CA, USA

X In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience architecting hardware solutions or performance optimizations for large-scale ML training and inference.
• Experience with deep learning frameworks such as TensorFlow or PyTorch.
• Deep understanding of ML trends, business drivers, and the software ecosystem.
• Ability to engage and collaborate with hardware designers, software architects, and ML researchers.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Staff Co-Design Engineer on the TPU Architecture team, you will act as a key technical anchor bridging the gap between model architecture innovation and next-generation hardware design. Operating cross-functionally across AI research and engineering, you will help shape the architectural roadmap for our future machine learning serving and training capabilities. You will drive the integration of Machine Learning (ML) research such as the training and serving of massive foundation models with advanced silicon architectures to deliver industry-leading, high-performance, and power-efficient accelerators.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Staff Co-Design Engineer on the TPU Architecture team, you will act as a key technical anchor bridging the gap between model architecture innovation and next-generation hardware design. Operating cross-functionally across AI research and engineering, you will help shape the architectural roadmap for our future machine learning serving and training capabilities. You will drive the integration of Machine Learning (ML) research such as the training and serving of massive foundation models with advanced silicon architectures to deliver industry-leading, high-performance, and power-efficient accelerators.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits

• Drive the definition and optimization of the hardware/software stack to enable performant training and serving of large ML models.
• Collaborate with research and modeling teams to innovate on model architectures, focusing on scaling, quality, and their direct impact on hardware performance.
• Lead the development of configurable architectural simulators and cycle-accurate performance models to quantify microarchitectural optimizations and evaluate architectural decisions.
• Conduct system-level performance analysis across highly distributed ML systems, innovating new methodologies to balance compute, memory bandwidth, and inter-chip network requirements.
• Engage with partners across hardware design, compiler development, and ML research to transition architectural innovations from concept to production.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.