Performance Architecture

Baya Systems; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Comprehensive medical, dental, and VIS

401(k) retirement plan

Equity

Job summary

Baya Systems is a fast-moving Series B startup focused on software-driven fabric solutions for single-die and multi-die systems. We are hiring a Senior Performance Architect to develop system software in Python and C++, and to design fabric and cache architecture models that enable high-performance IPs.

The role requires a Master’s degree and 6+ years in semiconductor/CAD, with expertise in performance modeling, data structures, algorithms, and concurrent systems.

Qualifications

• Master’s degree or equivalent experience in CS/CE/EE.
• Minimum 6 years in semiconductor or CAD industry.
• Strong OO programming in Python and C++.
• Experience with performance modeling of IPs and SoCs using SystemC or C++.
• Knowledge of computer architecture, CPU, memory and interconnects.
• Expert level data structures and algorithms knowledge.
• Expert level in building concurrent system models.
• Experience with modern code development: Git, CI, UI.

Responsibilities

• Develop system software in Python and C++.
• Develop fabric and cache architecture models and data structures.
• Develop core software optimization algorithms and platforms.
• Collaborate with architects and designers to create performance models for various IPs.

Skills

Python

C++

Performance modeling

Data Structures & Algorithms

Concurrency models

Git

CI

UI

Education

Master’s degree in Computer Science / Computer Engineering / Electrical Engineering

Tools

SystemC

Job description

Baya Systems is inspired by the baya bird, also known as the weaver. Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient.

Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era. We focus on software-driven, unified fabric solutions for single-die and multi-die systems. We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems. This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets. We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services!

Hands on Performance Architecture, Performance Modeling, Performance Engineering

Onsite Locations - Santa Clara, CA / Austin, TX / Cambridge or Bristol, UK / Bengaluru, India

Experience Levels - Mid Level to Sr. Engineer / Principal

Responsibilities:

• Develop system software in Python and C++
• Develop fabric and cache architecture models and data structures
• Develop core software optimization algorithms and platforms
• Work closely with architects and designers to find innovative ways to develop performance models for different IP’s

Requirements and Qualifications:

• Master’s degree in Computer Science, Computer Engineering or Electrical Engineering (or equivalent experience)
• Minimum of 6 years of experience in the semiconductor or CAD industry
• Strong object-oriented programming skills with Python and C++
• Experience with performance modeling of IP’s and SoC’s using System C or C++
• Experience with computer architecture, CPU, Memory and Interconnects
• Expert level knowledge of Data Structures and Algorithms
• Expert level knowledge of building concurrent system models
• Experience with modern code development practices : Git, CI, UI
• Strong interpersonal, communication and teamwork skills

Compensation:

• Salary commensurate with experience
• Performance incentives
• Comprehensive medical, dental, and vision benefits
• 401(k) retirement plan
• Equity