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PE Verification Engineer

Rambus.com

San Jose (CA)

Hybrid

USD 129,000 - 241,000

Full time

Today
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Job summary

Rambus is seeking a Principal Verification Engineer to join their Memory Interconnect Design team in San Jose. This full-time role involves leading verification efforts, defining plans, and mentoring junior designers, offering a competitive salary and benefits.

Benefits

401(k) matching
employee stock purchase plan
comprehensive medical and dental benefits
gym membership

Qualifications

  • 10+ years verification experience with MS EE or 7+ years with PhD EE.
  • Significant experience with SystemVerilog, Verilog, and UVM.
  • Experience in verification of DDR memory interfaces is desirable.

Responsibilities

  • Lead full-chip and block-level verification.
  • Define verification plans with Architects and designers.
  • Implement testbenches using UVM methodology.

Skills

SystemVerilog
Verilog
UVM methodology
scripting skills
Linux/Unix environment knowledge
communication skills

Education

MS EE
PhD EE

Tools

ASIC verification flows

Job description

Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. Candidates will join some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

As a Principal Verification Engineer, the candidate will report to the Director of Design Engineering and this is a Full-Time position. The successful applicant will have a highly visible role in product design across Rambus sites and will take ownership of defining and executing verification plans for products.

Location: San Jose, CA or Morrisville, NC

Responsibilities
  • Serve as the technical lead for full-chip and/or block-level verification.
  • Define verification plans in coordination with Architects, Logic, and Mixed-signal designers.
  • Implement testbenches, monitors, and scoreboards using UVM methodology.
  • Achieve code coverage goals and ensure thoroughly verified designs.
  • Collaborate with the Lab/System team for test planning, silicon bring-up, and debugging.
  • Contribute to flow and methodology development within a dynamic and interdisciplinary R&D group.
  • Mentor junior designers.
Qualifications
  • MS EE with 10+ years or PhD EE with 7+ years of verification experience.
  • Significant experience with coding in SystemVerilog or Verilog and UVM methodology.
  • Experience in verification of DDR memory interfaces is highly desirable.
  • Proficiency with standard ASIC verification flows and software tools.
  • Experience with analog/mixed-signal products is highly desirable.
  • Strong scripting skills and Linux/Unix environment knowledge.
  • Experience leading and driving technical solutions across organizations.
  • Excellent written and verbal communication skills, with a strong commitment to teamwork in cross-functional and global teams.
About Rambus

With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products that speed performance, expand capacity, and improve security for demanding applications. Our interface, security IP, and memory interface chips enable SoC and system designers to realize their visions for the future.

Rambus offers a competitive compensation package including salary, bonus, equity, 401(k) matching, employee stock purchase plan, comprehensive medical and dental benefits, time-off, and gym membership.

The US salary range for this full-time position is $129,300 to $240,100, depending on role, level, location, skills, experience, and market conditions.

We are committed to fostering a culture of diversity, equity, and inclusion, valuing differences in backgrounds and perspectives to enhance collaboration, teamwork, and innovation. We believe everyone should feel respected, included, and heard.

Rambus is an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based on race, religion, color, national origin, sex, sexual orientation, gender identity, age, veteran status, disability, genetic information, or other protected characteristics.

We provide reasonable accommodations for qualified individuals with disabilities and disabled veterans during our hiring process. If you need assistance or accommodations, please inform us in your application.

We do not accept unsolicited resumes from headhunters or recruitment agencies.

For more information, visit rambus.com. For career opportunities and more about life at Rambus, visit rambus.com/careers.

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