PCB Layout Engineering Lead

OpenKrill

United States

Presencial

USD 210 000 - 230 000

Tempo integral

14 dias+
Gerador de candidaturas

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Resumo da oferta

Cerebras Systems is seeking an exceptional PCB Layout Lead to own the physical implementation of complex, high‑performance boards for AI systems. You will translate schematics into production‑ready layouts, optimize signal and power integrity, thermal performance, reliability, and manufacturability.

You will own multilayer layouts from placement through fabrication release, collaborating with SI/PI, mechanical, thermal, and manufacturing teams to ensure high yield and first‑pass success on AI

Qualificações

  • Bachelors or equivalent in EE.
  • 10+ years in laying out complex, high-speed PCBs.
  • Proficient with Cadence Allegro and Constraint Manager.
  • Strong knowledge of SI/PI, EMI, thermal design, and manufacturability.

Responsabilidades

  • Own multilayer PCB layout from placement to fabrication release.
  • Translate schematics and constraints into board designs.
  • Define stackups, controlled-impedance routing, and length/phase matching.
  • Place and route high-speed digital, power, and analog circuits, including BGA fanout.
  • Apply SI/PI best practices to minimize crosstalk, noise, and EMI.
  • Collaborate with electrical, mechanical, thermal, and manufacturing teams to resolve issues.
  • Work with fabrication partners to validate stackups and via structures to improve yield.
  • Perform design reviews, DFx checks, and generate release packages (Gerbers, IPC-2581).
  • Maintain footprints, padstacks, libraries, and release docs.
  • Support prototype builds, bring-up, failure analysis, and revisions.

Conhecimentos

PCB layout
Cadence Allegro
High-speed routing
Signal integrity
Power integrity
HDI structures
BGA escape routing
Team collaboration

Formação académica

Bachelor’s degree in Electrical Engineering

Ferramentas

Cadence Allegro PCB Designer
Constraint Manager
Altium Designer

Descrição da oferta de emprego

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.

This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.

Cerebras works with the leading model labs, global enterprises, and cutting‑edge AI‑native startups. OpenAI recently announced a multi‑year partnership https://openai.com/index/cerebras-partnership/ with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high‑speed inference.

Cerebras is seeking an exceptional PCB Layout Lead to own the physical implementation of complex, high‑performance printed circuit boards for AI systems. This role will translate schematics and engineering requirements into production‑ready layouts, optimizing signal integrity, power integrity, thermal performance, reliability, and manufacturability.

Responsibilities
  • Own multilayer PCB layout from initial component placement through fabrication and assembly release.
  • Translate schematics, mechanical constraints, and electrical requirements into constraint‑driven board designs using industry‑standard PCB layout tools.
  • Define and implement board stackups, controlled‑impedance structures, routing rules, reference planes, return paths, and length‑and‑phase‑matching constraints.
  • Place and route high‑speed digital, high‑current power, and sensitive analog circuits, including dense BGA fanout and differential interfaces.
  • Apply signal‑integrity and power‑integrity best practices to minimize crosstalk, discontinuities, noise, voltage drop, and electromagnetic interference.
  • Collaborate with electrical, SI/PI, mechanical, thermal, compliance, manufacturing, and test engineers to establish constraints and resolve layout issues.
  • Work with fabrication and assembly partners to select materials, validate stackups and via structures, and improve yield, cost, and schedule.
  • Perform design reviews and DFM, DFA, and DFT checks; generate and verify fabrication drawings, assembly drawings, drill data, Gerbers, ODB++, IPC‑2581, and related release packages.
  • Maintain component footprints, padstacks, design libraries, layout standards, and release documentation.
  • Support prototype builds, board bring‑up, failure analysis, and layout revisions through production.
Minimum Qualifications
  • Bachelor’s degree in electrical engineering, electronics engineering, or a related field, or equivalent practical experience.
  • 10+ years of hands‑on experience laying out complex, high‑speed, multilayer printed circuit boards.
  • Expertise with Cadence Allegro PCB Designer and Constraint Manager; experience with Altium Designer or equivalent tools is also relevant.
  • Strong knowledge of component placement, controlled‑impedance routing, differential pairs, length matching, return‑path continuity, and power distribution.
  • Experience with dense BGA escape routing, HDI structures, blind and buried vias, microvias, via‑in‑pad, and backdrilling.
  • Working knowledge of signal integrity, power integrity, EMI/EMC, thermal design, creepage and clearance, and high‑current routing.
  • Experience applying IPC standards and fabrication, assembly, test, and manufacturability requirements.
  • Ability to create and review complete PCB fabrication and assembly release packages.
  • Ability to thrive in a fast‑paced, dynamic environment and adapt to changing priorities.
  • Excellent collaborative and interpersonal skills with multi‑disciplined teams.
  • Experience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc.
Preferred Qualifications
  • Experience designing large, high‑layer‑count boards for compute, networking, server, or AI accelerator systems.
  • Experience routing high‑speed interfaces such as DDR4/DDR5, PCIe Gen4/Gen5 or later, Ethernet, USB, and multi‑gigabit SerDes.
  • Experience with high‑current, low‑voltage power delivery, VRM placement, decoupling strategy, copper balancing, and thermal optimization.
  • Experience developing Allegro SKILL, scripts, or automation that improves layout quality and release efficiency.
  • Demonstrated success delivering first‑pass functional boards and supporting products from prototype through volume production.

Location: Remote. Sunnyvale, CA (Hybrid) is highly preferred.

The base salary range for this position is $210,000 – $230,000+ annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

Why Join Cerebras

People who are serious about software make their own hardware. At Cerebras, we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

  • Build a breakthrough AI platform beyond the constraints of the GPU.
  • Publish and open source their cutting‑edge AI research.
  • Work on one of the fastest AI supercomputers in the world.
  • Enjoy job stability with startup vitality.
  • Our simple, non-corporate work culture that respects individual beliefs.

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

This website or its third‑party tools process personal data. For more details, click here https://www.cerebras.net/privacy/ to review their CCPA disclosure notice.

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