Onsite FPGA Engineer — Prototyping & RTL (Redmond)

Feitong Buke; Redmond (WA); On-site; USD 96,432 - 110,208; Full time

Benefits offered by this job

Medical benefits

Paid Time Off

401K Plan

Job summary

Feitong Buke is seeking an experienced FPGA Engineer to develop and validate code for FPGAs in Redmond, WA. This role requires collaboration with electrical and firmware engineers and includes writing test benches for Verilog IPs.

The ideal candidate will have at least 4 years of design experience in Verilog/System Verilog and familiarity with FPGA development tools. Comprehensive employee benefits and a competitive hourly rate of $70-$80/hr are offered.

Qualifications

• 4+ years of experience in FPGA design using Verilog or System Verilog.
• Experience with Lattice or AMD/Xilinx/Gowin FPGAs.
• Programming experience in Python, TCL, or equivalent.

Responsibilities

• Develop and validate RTL code targeting FPGAs.
• Collaborate with engineers to review and finalize schematics.
• Write test benches for critical Verilog IPs.

Skills

FPGA design experience in Verilog or System Verilog

FPGA design experience using Lattice or AMD/Xilinx/Gowin

Programming experience in scripting languages

Education

Bachelor’s degree in Electrical Engineering or equivalent

Tools

ModelSim/Questa RTL simulators

Test equipment such as oscilloscopes and logic analyzers

Job description

Feitong Buke is seeking an experienced FPGA Engineer to develop and validate code for FPGAs in Redmond, WA. This role requires collaboration with electrical and firmware engineers and includes writing test benches for Verilog IPs.

The ideal candidate will have at least 4 years of design experience in Verilog/System Verilog and familiarity with FPGA development tools. Comprehensive employee benefits and a competitive hourly rate of $70-$80/hr are offered.