Ocotillo Technology Fabrication Defect Metrology Layer Owner

Intel; Phoenix (AZ); On-site; USD 89,000 - 171,000; Full time

Job summary

Intel Foundry is advancing defect metrology with inline real-time monitoring to drive yield improvements across its Arizona manufacturing segment. The Defect Metrology Layer Owner will deliver high-quality analytical insights to minimize defects by collaborating with process engineers to enhance tool and process capability.

The role requires strong data analysis, problem solving, and cross-functional leadership to address complex yield issues in a fast-paced semiconductor environment.

Qualifications

• Bachelor’s degree in related engineering/science field.
• 2+ years semiconductor fabrication experience or Master’s degree.
• Experience with SPC, DOE and statistical data analysis.

Responsibilities

• Perform detailed data analysis to identify root causes of defects.
• Identify exclusionary/baseline defect sources and propose fixes.
• Lead continuous improvement projects for defect performance.
• Provide expertise on process flow segments and defect analysis.
• Lead cross-functional teams to reduce defects and troubleshoot yield.

Skills

Analytical skills

Interpersonal skills

Communication skills

Team collaboration

Education

Electrical Engineering

Physics or Chemistry

Tools

JMP/JSL

Python

R

SQL

Job description

Job Details

Job Description: Intel is looking for highly motivated individuals with strong technical background and capabilities to sustain, ramp, and transfer all technology nodes in Arizona. They will drive rapid continuous improvements in safety, quality, yield, reliability, cost, process stability/capability, and productivity while maintaining rigorous quality control.

Intel Foundry is increasing its investment in defect metrology technology, implementing a new Win It Inline initiative using advanced real-time monitoring to improve yield learning cycles. Investing in inline metrology will give engineers more data throughout the manufacturing process, as opposed to waiting for end of the line data - a fundamental shift in how we leverage data to build chips.

The Defect Metrology Layer Owner role is to deliver high-quality analytical insights that influences / directs the factory resources to minimize defects for a segment of the manufacturing line by working with the process engineers for that segment to improve the capability of the tools and process.

Primary responsibilities for this role will include, but are not limited to:

• Performing detailed data analysis using various statistical/data mining tools to identify the root cause of defect issues.
• Identifying exclusionary or baseline sources of defects and recommending/leading corrective actions/fixes.
• Lead/participate continuous improvement projects on products and processes for improved defect performance.
• Provide expertise on process flow segments and control all aspects of defect analysis related to these areas.
• Lead/participate in multi-area problem solving teams to provide defect reduction expertise to troubleshoot complex yield problems.

A successful candidate will demonstrate the following skills and behavioral traits:

• Analytical skills and a passion for data analysis and problem solving.
• Organizational skills with an attention to detail.
• Interpersonal skills with the ability to work with people at all levels.
• Communication and presentation skills to influence a wide variety of groups at all levels.
• Support manufacturing technicians and interact with on-site vendor field service engineering, the capability of working in a high performing team culture which includes excellent teamwork and leadership skills, demonstrated problem solving and prioritization skills, and driving high-performance maintenance goals for the group.

Qualifications

Minimum Qualifications

• Bachelor's Degree in Electrical Engineering, Microelectronics Engineering, Material Science Engineering, Chemical Engineering, Mechanical Engineering, Optical Engineering, Statistics/Data Science, Chemistry, Physics, or related field of study
• 2+ years relevant experience in Semiconductor fabrication and processing techniques (Lithography, Etch, CMP, Thin Films, Plating, etc.) OR Master’s degree in related field
• Experience with Statistical Process Control (SPC), Design of experiments (DOE) principles, and Statistical data analysis

Preferred Qualifications

• Active US Government TS Security Clearance with SCI access OR the ability to obtain and maintain a US Government TS Security Clearance with SCI access (requires US Citizenship)
• Statistical Data Analysis and Programing Experience in JMP/JSL, Python, R and SQL.
• 3+ years of New Technology startup experience.
• 3+ years of relevant experience in Process/Yield Engineering.
• Demonstrate strong technical and troubleshooting skills.
• Experience in manufacturing environment.
• Experience in metrology.
• Demonstrate exceptional customer orientation.
• Demonstrate the ability to work across organizational boundaries including process engineering, integration and yield.
• Performs exceptionally well with a strong tolerance for ambiguity and change.
• Experience working in a semiconductor foundry and/or OSAT environment, with an understanding of wafer fabrication, assembly, test, and manufacturing operations.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, Arizona, Phoenix

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $89,010.00 - 170,630.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.