NVM/RRAM Device-PI Engineer (R&D)

Texas Instruments

Dallas (TX)

Vor Ort

USD 80.000 - 100.000

Vollzeit

14 Tage+

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Zusammenfassung

Texas Instruments in Dallas is seeking a dedicated engineer for high-density non-volatile memory (NVM) device development. In this role, you will collaborate with experts in various disciplines, engaging in responsibilities that span from bitcell design to device fabrication.

This position presents growth opportunities in a dynamic and competitive semiconductor market, requiring innovative problem-solving and teamwork to bring new technologies to production.

Qualifikationen

  • Experience with bitcell design and process integration.
  • Familiarity with SWR/DOE experiments and test structure definition.
  • Ability to analyze data and generate design rules.

Aufgaben

  • Collaborate on NVM device development from definition to delivery.
  • Engage in device characterization and simulation activities.
  • Work with multiple business and development groups.

Jobbeschreibung

Job Description:

You will join a small development team responsible for high density non-volatile memory (NVM) device path-finding and development activities. Working with talented and driven contributors, you will take part in making strategic decisions for TI’s NVM devices on future technologies, and delivering these high-density, production-worthy and reliable memory technologies on a tight schedule. You will engage in every step of the development of new technology, in one of the current most sought-after semiconductor markets, NVM technology. From component definition to device fabrication and product delivery, you will collaborate with experts from a wide range of disciplines including process, design, failure analysis… to bring the technology development to fruition. This is a high growth position interacting with multiple business groups, development groups, and fabrication facilities.

The opening is within Advanced Technology Development of the Technology and Manufacturing Group. Responsibilities include bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, data analysis, design rule generation, device characterization, and device simulation.

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