New Grad Memory Design Engineer

Logi Code; Boise, Northern (ID, KY); Hybrid; USD 90,000 - 150,000; Full time

Job summary

Micron Technology in Idaho is seeking a Design Engineer to contribute to the design and analysis of digital and analog memory circuits. You will collaborate with global engineering teams to optimize performance, manufacturability, cost, and time-to-market while supporting end-to-end product development and validation.

Responsibilities include schematic design, layout development, and verification, as well as applying AI-enabled tools to improve design flow and simulation accuracy across memory

Qualifications

• Bachelor’s degree in electrical engineering or higher.
• Foundational understanding of memory architectures, circuit design, and semiconductor device behavior.
• Experience with circuit simulation setup, debugging, and analysis using SPICE or Verilog.
• Strong communication skills for presenting concepts to multi-functional teams.

Responsibilities

• Design, simulate, and optimize memory circuits, including layout development and verification using industry-standard tools (e.g., SPICE, Verilog).
• Develop schematic blocks such as memory arrays, control logic, datapaths, and address decoders.
• Analyze design trade-offs across power, speed, die size, and manufacturability.
• Collaborate with Product Engineering, Test, Process Integration, Assembly, and Marketing teams.
• Apply AI-enabled tools to improve circuit design efficiency, simulation accuracy, and design flow optimization.

Skills

Memory architectures

Circuit design

SPICE

Verilog

Education

Bachelor’s degree in Electrical Engineering (BSEE)

Tools

SPICE

Verilog

Job description

Micron Technology in Idaho is seeking a Design Engineer to contribute to the design and analysis of digital and analog memory circuits. You will collaborate with global engineering teams to optimize performance, manufacturability, cost, and time-to-market while supporting end-to-end product development and validation.

Responsibilities include schematic design, layout development, and verification, as well as applying AI-enabled tools to improve design flow and simulation accuracy across memory