mmW/RF/Analog Circuit Design Engineer(7083)

TSMC; San Diego (CA); On-site; USD 166,000 - 250,000; Full time

Benefits offered by this job

Relocation support

Visa sponsorship for exceptional candidates

Comprehensive benefits

Job summary

TSMC, located in San Diego, CA, is looking for a highly motivated mmW/RF/Analog Circuit Design Engineer to lead RF circuit design using advanced technology nodes. The role involves designing and validating critical components while working collaboratively with teams in the U.S. and Taiwan.

Ideal candidates have extensive experience, especially in RFIC fundamentals and tool proficiency, along with a commitment to mentorship and innovation.

Qualifications

• 15+ years of experience in mmW/RF/Analog circuit design.
• Proven tape-out experience and involvement in commercial designs.
• Hands-on experience in mixed-signal and analog circuit design.

Responsibilities

• Design, simulate, and validate mmW/RF/Analog building blocks.
• Collaborate with test engineers for silicon-tosimulation correlation.
• Mentor junior designers and foster innovation.

Skills

mmW/RF/Analog circuit design

Cadence Virtuoso

Spectre RF

MATLAB

EMX

HFSS

Python/Perl/Tcl for automation

Education

Master’s or Ph.D. in Electrical/Computer Engineering

Tools

RFIC fundamentals knowledge

semiconductor device physics knowledge

Job description

Overview Of Role

We are seeking a highly motivated mmW/RF/Analog Circuit Design Engineer to join TSMC’s RF design team and pioneer the use of advanced technology nodes in RF and mmWave circuit design. This role is central to developing TSMC’s future methodologies, leveraging innovative semiconductor technologies, and strengthening TSMC’s competitive position against leading global foundries. The position offers an opportunity to work with world‑class technology, publish high‑impact research, and engage in cross‑functional collaborations across the U.S. and Taiwan. Successful candidates will be strong individual contributors who can grow into mentors and future leaders.

Responsibilities

• RFIC Design & Methodology – Design, simulate, and validate mmW/RF/Analog building blocks (LNAs, mixers, TIAs, VCOs, PLLs, LOGENs, etc.), while developing robust methodologies and design flows for the team.
• Design‑Technology Co‑Optimization (DTCO) – Partner with technology development teams to push transistor‑level feasibility and achieve PPA (power, performance, area) breakthroughs in advanced nodes.
• Silicon Validation – Collaborate with test engineers to drive accurate silicon‑to‑simulation correlation, debugging, and optimization.
• Electromagnetic Simulation – Create and validate EM isolation methodologies for on‑chip, package, and PCB integration.
• Mentorship – Initially operate as an independent contributor; gradually mentor junior designers and foster a culture of innovation.

Minimum Qualifications

• Master’s or Ph.D. in Electrical/Computer Engineering or related field.
• 15+ years direct experience in mmW/RF/Analog circuit design for wireless/communication applications.
• Proven tape‑out experience and direct involvement in delivering commercial designs.
• Demonstrated hands‑on experience in the design of mixed‑signal, analog, RF, or high‑speed link circuits for wireless or wireline products.
• Strong understanding of RFIC fundamentals (noise, linearity, stability, mismatches, power efficiency, impairments).
• Expertise in tools: Cadence Virtuoso, Spectre RF, ADS, MATLAB, EMX, HFSS.
• Solid knowledge of semiconductor device physics and process technology.
• Strong analytical skills and the ability to translate system requirements into design specifications.
• Excellent communication skills and willingness to work across Taiwan and U.S. teams.

Preferred Qualifications

• Ph.D. with strong publication record (patents, journals, conferences).
• Familiarity with RF transceiver architectures and design trade‑offs.
• Experience in mixed‑signal verification methodologies.
• Proficiency in Python/Perl/Tcl for design automation.
• Prior exposure to AI/ML‑based design optimization.
• Knowledge of reliability analysis (EM, IR‑drop, thermal effects) and design for testability.
• Familiarity with semiconductor ecosystem.

Location

Primary location: San Diego, CA or Hsinchu, Taiwan. Relocation support and visa sponsorship may be considered for exceptional candidates. Some travel to Taiwan HQ expected.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law. TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at [e-mail]. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case‑by‑case basis.

Pay Transparency / Benefits Statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $166,000 and $250,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs. For roles hired outside of California, including other U.S. states or international locations such as Taiwan, compensation may vary in accordance with local market practices, legal requirements, and TSMC’s regional compensation framework.