MLA IP Design Verification Engineer, Annapurna Labs

Amazon; Austin (TX); On-site; USD 90,000 - 150,000; Full time

Job summary

Join a forward-thinking company as a Design Verification Engineer, where you will play a pivotal role in shaping the future of cloud server platforms. This dynamic position involves verifying and validating cutting-edge hardware and software solutions, ensuring they meet high standards of functionality. You'll work within an inclusive team that values diverse perspectives and encourages professional growth through mentorship. With flexible working hours and a strong emphasis on work-life balance, this is an exciting opportunity to contribute to innovative projects in a supportive environment.

Benefits

Flexible working hours

Mentorship programs

Employee-led affinity groups

Ongoing learning experiences

Qualifications

• 3+ years of experience in design verification using SystemVerilog and UVM.
• Experience in developing testbenches with stimulus and checkers.

Responsibilities

• Verify and validate hardware and software solutions for cloud server platforms.
• Develop and execute comprehensive verification plans.

Skills

SystemVerilog

UVM

C/C++

Python

Perl

Education

Bachelor's Degree in Electrical Engineering

Bachelor's Degree in Computer Science

Bachelor's Degree in Computer Engineering

Tools

Testbench Development

Verification Platforms

Job description

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.

We are seeking experienced Design Verification Engineers to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we handle massive scale and rapid integration of emergent technologies.

As a member of the Cloud-Scale Machine Learning Acceleration team, you will be responsible for designing and validating machine learning hardware in our data centers.

Your responsibilities will include verifying and validating that our hardware and software solutions achieve their desired functionality, developing and executing verification and validation plans, and measuring progress towards customer metrics.

Key job responsibilities

• Verifying and validating hardware and software solutions.
• Developing and executing comprehensive verification plans.
• Measuring team progress towards customer metrics.

About the team

Our inclusive team culture embraces diversity and promotes inclusion through employee-led affinity groups, conferences, and ongoing learning experiences. We value diverse perspectives, curiosity, and trust, as reflected in our 16 Leadership Principles.

Work/Life Balance

We prioritize work-life balance by offering flexible working hours and encouraging a healthy flow between personal and professional life.

Mentorship & Career Growth

We support new team members through knowledge sharing and mentorship, aiming to help each individual develop into a well-rounded professional capable of handling complex tasks.

Basic Qualifications

• Bachelor's Degree or higher in Electrical Engineering, Computer Science, or Computer Engineering.
• At least 3 years of design verification experience using SystemVerilog and UVM.
• Experience in testbench development, including stimulus, checkers, assertions, and coverage.

Preferred Qualifications

• Experience verifying multiple logic levels, including IP blocks and full subsystems.
• Experience with multiple verification platforms.
• Proficiency in C/C++ and object-oriented programming.
• Experience with scripting languages such as Python or Perl.

We are an equal opportunity employer committed to diversity and inclusion. For accommodations during the application process, please visit our website. Compensation varies based on location, skills, and experience, with additional benefits offered. Please apply via our career site. This position remains open until filled.