Memory Verification Engineer – DRAM & SoC Validation

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 90,000 - 120,000; Full time

Benefits offered by this job

Choice of medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

1000 Micron Technology, Inc. is seeking a Design Verification Engineer in Boise, Idaho to validate complex memory architectures. You will verify DRAM designs, maintain test benches, and collaborate with teams to ensure reliability and innovation.

The ideal candidate has a Bachelor’s in Engineering, understanding of CMOS design, and familiarity with SystemVerilog among other tools. Micron offers extensive benefits including healthcare plans, paid time off, and family leave.

Qualifications

• Bachelor’s degree or equivalent in Electrical or Computer Engineering.
• Understanding of CMOS circuit design and mixed-signal verification.
• Experience with SystemVerilog, UVM, and SystemVerilog Assertions.

Responsibilities

• Verify DRAM architectures through pattern development and functional coverage.
• Build and maintain digital and mixed-signal test benches.
• Collaborate with global teams and support design teams.

Skills

SystemVerilog

Mixed-signal verification

Debugging skills

Technical communication

Education

Bachelor’s degree in Electrical or Computer Engineering

Master’s degree

Tools

HSPICE

VerilogHDL

FINESIM

Python

Job description

1000 Micron Technology, Inc. is seeking a Design Verification Engineer in Boise, Idaho to validate complex memory architectures. You will verify DRAM designs, maintain test benches, and collaborate with teams to ensure reliability and innovation.

The ideal candidate has a Bachelor’s in Engineering, understanding of CMOS design, and familiarity with SystemVerilog among other tools. Micron offers extensive benefits including healthcare plans, paid time off, and family leave.