Memory Design & Verification Engineer (Mixed-Signal)

Micron Technology, Inc; Folsom (CA); On-site; USD 116,000 - 246,000; Full time

Job summary

Micron Technology, Inc in California seeks a Design and Verification Engineer to help verify advanced memory technologies, from the memory array to the interface block, including DRAM and emerging memories.

Responsibilities include building SystemVerilog testbenches, using Verilog-based tools, and collaborating with digital teams to debug and ensure functional accuracy, with focus on mixed-signal circuit development.

Qualifications

• Bachelor’s, Master’s, Ph.D., or equivalent experience in Electrical Engineering, Electronics, or a related field.
• 4+ years of verification engineering experience in digital, analog, or mixed-signal verification.
• Experience in custom design (schematic-based) and RTL verification flows, with exposure to mixed-signal circuit design.
• Strong knowledge of semiconductor physics, electronic circuits, and circuit-level verification using SPICE, analog, and Verilog-based design tools.
• Proficiency with UNIX and Cadence design environments, including simulation, schematic entry, and SPF extraction.

Responsibilities

• Perform comprehensive chip-wide functional verification on Micron memory development projects.
• Develop verification plans by thoroughly understanding composition specifications.
• Build SystemVerilog testbenches to achieve complete functional coverage.
• Apply SystemVerilog assertions and verification techniques detailed in testing.
• Collaborate with digital design teams to debug test cases and ensure functional accuracy.
• Analog-digital circuit compose and develop.

Skills

SystemVerilog

Digital verification

Analog/mixed-signal verification

Problem solving

Education

Bachelor/Master/PhD in Electrical Engineering

Tools

Cadence

FastSpice

Co-simulation

Job description

Micron Technology, Inc in California seeks a Design and Verification Engineer to help verify advanced memory technologies, from the memory array to the interface block, including DRAM and emerging memories.

Responsibilities include building SystemVerilog testbenches, using Verilog-based tools, and collaborating with digital teams to debug and ensure functional accuracy, with focus on mixed-signal circuit development.