Memory CMOS Design Engineer - Analog & Digital

Micron Technology, Inc; Boise (ID); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical, dental & vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. seeks a Semiconductor Design Engineer to design and analyze digital and analog circuits for memory product development. You will collaborate with global teams to optimize manufacturing performance, cost, and reliability. The role requires strong experience in power delivery networks and silicon verification against simulations.

Relocation TBD. We offer comprehensive benefits and opportunities to work on next-generation memory technologies across multiple process nodes.

Qualifications

• Bachelor’s degree in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field.
• Master’s degree in Computer Engineering, Electrical Engineering, or related field and 3 years of related experience.

Responsibilities

• Design and analyze digital and analog circuits for memory product development.
• Collaborate with global design and verification teams to optimize manufacturing performance and cost.
• Evaluate and optimize power delivery networks in DRAM designs and design block-level generators.
• Verify silicon performance vs simulations and participate in chip layout verification and parasitic extraction.

Skills

Circuit design

Circuit verification

Analog design

Digital design

Unix

Cadence

Education

Bachelor's degree in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field

Master’s degree in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field

Tools

UNIX

Cadence

Job description

Micron Technology, Inc. seeks a Semiconductor Design Engineer to design and analyze digital and analog circuits for memory product development. You will collaborate with global teams to optimize manufacturing performance, cost, and reliability. The role requires strong experience in power delivery networks and silicon verification against simulations.

Relocation TBD. We offer comprehensive benefits and opportunities to work on next-generation memory technologies across multiple process nodes.