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SF Tensor is building the fastest GPU compiler and model foundry to enable AI across clouds and chips. We’re hiring a Member of Technical Staff to own the modeling side from data curation through distillation to deployment, working with SFT, RL, and DPO to ship post-trained models in production.
This role sits in San Francisco, offers relocation assistance and meaningful equity, and pays a base salary of $275,000–$315,000 with comprehensive benefits.
At SF Tensor, we're building the future of high-performance compute
We firmly believe that the future of AI depends on the unglamorous: rethinking and rebuilding the stack, all the way down. From the hardware underneath it to the compiler targeting it and the cloud running it. Right now those three things fight each other and that friction shows up as a tax on every researcher trying to build something ambitious. We're here to axe that tax and make compute faster, cheaper and more available. When we succeed, compute will be portable enough that "which cloud, which chip" stop being something you worry about.
To achieve this, we are building our Kernel Optimizer, which takes code and finds its fastest possible form for whatever vendor and cluster topology you point it at, automatically, as well as the Model Foundry which manages the runs, makes research easier and moves workloads across clouds and chips as prices and availability ship, instead of leaving you locked into whatever vendor you signed with first.
We're backed by Susa Ventures, Y Combinator, along with some great funds and angels including Max Mullen and Paul Graham, as well as founders and executives at Neuralink, Notion and AMD. We're looking for researchers, engineers and organizations who agree with the basic premise: you don't get the next leap in AI without a leap in compute first.
We build the fastest GPU compiler in the world. Most compilers have to preserve correctness at every transform, constraining how far they can search, while we prove correctness at the end instead, allowing us to search a far wider space, with agents, with RL, with anything that works and still guarantee the result. It's why we hold #1 on NVIDIA's own kernel benchmark across hundreds of production kernels.
Speed at the kernel layer is only worth what we do with it though and our enterprise offering promises we'll turn a customer's dataset into a specialist model in days. To do that we run SFT, RL, DPO, design evals and distillation down to smaller and edge-deployable models. We're hiring a Member of Technical Staff to own the modeling side of that end to end.
Most post-training people spend most of their time fighting infrastructure that they don't control and your ideas are never the bottleneck, the ability to execute them is. We invest heavily into integrating AI tooling into our infrastructure and model foundry to speed up the research process and get you from idea result as fast as possible. Beyond that, the people who wrote the rollout engine, the inference engine and the kernels under both are the same people you eat lunch with, so if your run is slow, a fix is a conversation and not a ticket.
We're a small team operating at frontier scale. We pre-trained foundation models on 4,000 AMD GPUs as a team of three, designed and brought up GB300 NVL72 clusters and designed a TOP500 supercomputer.
We believe that hard problems get solved in person and most of our work happens at our office in San Francisco. We offer relocation assistance and, where possible, we'd like you here as often as possible.
The base salary range for this full-time position is $275,000-$315,000, plus meaningful equity and benefits.