Manager, Electrical Engineering, Design Assurance

nerostechnologies; Torrance (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Neros is seeking a Manager of Electrical Engineer, Design Assurance to lead the design assurance function for airside and groundside platforms. You will own worst‑case circuit analysis, signal and power integrity, derating and DFMEA, and oversee EV/DV verification while building HIL stations and test fixtures.

This hands‑on leadership role requires hiring, mentoring, and delivering manufacturing‑ready designs as NPI moves to volume, with close collaboration across design, test, and production

Qualifications

• 10+ years in electrical hardware engineering with verification, validation, or qualification of complex mixed-signal and embedded electronics.
• Experience leading a team of engineers or technicians, including hiring activities and leadership.
• Track record of taking electronics through formal qualification to production release, including test plans and traceability.
• Hands‑on experience with worst‑case circuit analysis and component derating integrated into design processes.
• Signal integrity and power integrity analysis with feedback to design (stackup, impedance, termination, decoupling).
• Board and system‑level reliability methods: DFMEA, HALT/HASS, accelerated life testing, and derating verification.
• Experience building test infrastructure and automated data acquisition, including scripting (Python).
• Hands‑on circuit design experience with self‑designed schematics/boards and FE/FP collaboration.
• Experience with EMC/EMI testing (pre‑compliance or formal).
• Experience with NPI/manufacturing or contract manufacturers through ramp to production.
• Clear communication to document status and risk.

Responsibilities

• Build and lead the design assurance team, owning hiring and development.
• Establish worst‑case circuit analysis, component derating, and DFMEA as standard design practice.
• Own formal EV/DV verification for production electronics: test plans, procedures, reports, and traceability.
• Plan and execute engineering validation and design validation campaigns: functional, thermal, vibration, environmental, EMC/EMI pre‑compliance, power quality, and life testing.
• Design and build the test infrastructure for campaigns, including HIL stations and test fixtures.
• Partner with NPI and Test through industrialization: transfer verification and production test methods, and drive field failures back into design.

Skills

Electrical hardware

Team leadership

Qualification testing

EV/DV testing

Worst‑case analysis

Signal integrity

Power integrity

Test infrastructure

Schematic/board design

EMC/EMI testing

Tools

Oscilloscopes

Spectrum analyzer

Network analyzer

Environmental chamber

Automated data acquisition

Python scripting

Job description

Who we are

Neros is a defense technology company rebuilding America's drone industrial base. We design and manufacture high-performance unmanned systems that are tested in combat, iterated at startup speed, and built at massive scale. Our team culture is fast, hands‑on, and obsessed with closing the gap between design and deployment.

As drones transform the character of warfare, Neros is delivering the systems the West needs to compete on the modern battlefield and deter the adversaries of democracy. We're hiring engineers, operators, and builders who want to move fast, take on extreme ownership, and get capability into the hands of warfighters in months, not years.

What you will be doing

As the Manager of Electrical Engineer, Design Assurance at Neros, you will build and lead the design assurance function for our next generation airside and groundside platforms. You will own worst‑case circuit analysis, signal and power integrity, derating and DFMEA alongside formal EV/DV verification, design and build the HIL stations and test fixtures those campaigns run on, and carry the results through industrialization with our NPI and Test organization. This is a hands‑on leadership role: you will define the workflows and execute them yourself on hardware heading to volume, and you will hire, level, and develop the engineers who take them over.

Responsibilities

• Build and lead the design assurance team, owning the hiring pipeline for the function: writing requisitions, sourcing and screening, running interview loops, making level decisions, and developing engineers once they are on board.
• Establish worst‑case circuit analysis, component derating, and DFMEA as standard design practice, including methodology, templates, and the review criteria applied at every design gate.
• Own formal EV/DV verification for production electronics: test plans, procedures, reports, requirements traceability, and the gate criteria used at design review and release.
• Plan and personally execute engineering validation and design validation campaigns: functional, thermal, vibration, environmental, EMC/EMI pre‑compliance, and power quality, alongside accelerated life testing.
• Design and build the test infrastructure these campaigns depend on, including hardware‑in‑the‑loop stations, functional test fixtures, instrumented environmental setups, and automated data acquisition.
• Partner with NPI and Test through industrialization: land design‑for‑test coverage in the boards, transfer verification methods and limits into production test, and drive failures found in build, qualification, and the field back into design.

You should have the following

• 10+ years in electrical hardware engineering, with hands‑on ownership of verification, validation, or qualification of complex mixed‑signal and embedded electronics.
• Experience leading a team of engineers or technicians, formally or as a technical lead, including direct involvement in hiring: sourcing, screening, interviewing, leveling, and closing candidates.
• A track record of taking electronics through formal qualification (EV/DV or equivalent military, aerospace, or automotive programs) to production release, including authoring the test plans, procedures, reports, and requirements traceability.
• Hands‑on experience with worst‑case circuit analysis and component derating, applied as part of a design process rather than as a one‑time deliverable.
• Signal integrity and power integrity analysis, with a track record of feeding those findings back into the design: stackup and impedance decisions, termination, decoupling and PDN changes. Analysis that closed the loop on a design, not analysis delivered as a standalone report.
• Board and system‑level reliability methods: DFMEA, HALT/HASS, accelerated life testing, and derating verification. This is board‑level reliability, not silicon or device‑level reliability.
• Deep bench proficiency with oscilloscopes, spectrum and network analyzers, electronic loads and power analysis, environmental chambers, and vibration test equipment.
• Experience specifying and building test infrastructure: hardware‑in‑the‑loop stations, functional test fixtures, and automated data acquisition, including the scripting behind them (Python or similar).
• Hands‑on circuit design experience: schematics and boards you designed yourself, not only reviewed. Credible WCCA and SI/PI work depends on having done the design, and this role has to engage design engineers on failure mechanisms as a peer rather than as an auditor.
• Experience with EMC/EMI testing (pre‑compliance and/or formal) and environmental test standards such as MIL‑STD‑810, MIL‑STD‑461, DO‑160, or equivalent commercial standards.
• Experience working with NPI, manufacturing, or contract manufacturers through a production ramp, including design‑for‑test and production test development.
• Clear communication skills, with the ability to document rigorously and present verification status and risk crisply to program stak