Machine Learning Performance Engineer

Fintal Partners; Chicago (IL); On-site; USD 150,000 - 230,000; Full time

Job summary

Fintal Partners is seeking a Hardware Machine Learning Engineer to deploy ML directly onto custom hardware, including FPGAs or ASICs, in a high-performing trading environment.

You will architect models with traders and engineers, shape the hardware roadmap, and work hands-on with hardware teams to move from proof-of-concept to production.

Candidates should have advanced degrees and deep ML and hardware knowledge, with experience in VHDL/SystemVerilog, HLS, and ML frameworks.

Qualifications

• Understanding hardware constraints shapes how ML models map onto hardware.
• Experience with VHDL/SystemVerilog or HLS tools is required.
• Strong knowledge of neural networks and ML frameworks (PyTorch/TensorFlow).
• Proficiency in Python or C++ for tooling, testing, and simulation.
• An advanced degree in EE, CS, Physics, or a related field.

Responsibilities

• Architect and co-design ML models with traders and software engineers.
• Translate ML model requirements into concrete hardware decisions.
• Implement, verify, and deploy ML inference on custom hardware from PoC to production.
• Track research in neural architecture search, ML systems, and quantization.

Skills

Hardware design

FPGA

SystemVerilog

VHDL

HLS tools

ML frameworks

Neural networks

Python

C++

Education

MS or PhD in EE/CS/Physics

Tools

hls4ml

FINN

Vitis AI

MLIR

TVM

XLA

Job description

A leading global trading firm is expanding its machine learning capabilities and looking for an experienced Hardware Machine Learning Engineer to help deploy ML directly onto custom hardware.

This firm builds its own hardware, software, and infrastructure in-house, so when a model hits a latency wall or a resource ceiling, the engineer doesn't file a ticket and wait, they go fix it. There's no vendor to wait on and no abstraction layer they're not allowed to touch. This is a rare opportunity to architect solutions from scratch, influence technical research direction, and see the work drive real impact in one of the most demanding computing environments in the world.

What You'll Work On

• Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints like latency budgets, resource limits, and numerical precision as first-class design inputs
• Shape the custom hardware roadmap by translating ML model requirements into concrete architectural decisions
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production
• Track and evaluate emerging research in neural architecture search, machine learning systems, and quantization methods, and determine what translates to measurable improvements

Key Requirements

• Understanding of hardware constraints and design trade-offs (pipelining, resource utilization, fixed-point arithmetic) that shape how ML models map onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals: neural network architectures, inference optimization, quantization techniques, and ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python, C++, or similar languages for tooling, testing, and simulation
• Strong communication skills and the ability to work collaboratively across disciplines with both technical and non-technical teams
• An advanced degree (MS or PhD) in EE, CS, Physics, or a related field

Particularly Relevant Experience

Exposure to ML compiler infrastructure such as MLIR, TVM, or XLA; a background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, or real-time signal processing; familiarity with functional verification methodologies such as SystemVerilog, UVM, or Cocotb.

Trading experience is a bonus, not a prerequisite. The firm is looking for researchers and engineers from any background who want to push the boundaries of what's computationally possible.