Machine Learning Hardware Engineer

Fintal Partners

New York (NY)

On-site

USD 140,000 - 190,000

Full time

4 days ago
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Job summary

Fintal Partners in New York seeks an experienced Hardware Machine Learning Engineer to deploy ML directly on custom hardware, including FPGA/ASIC paths. You will architect ML models with latency budgets and work across traders, researchers, and software engineers.

You will shape hardware roadmaps, translate model requirements into architectural decisions, and implement inference solutions from proof-of-concept through production with hardware teams.

Qualifications

  • Advanced degree in EE/CS/Physics or related field.
  • Experience mapping ML models to hardware (FPGA/ASIC) for latency/throughput.
  • Proficient in Python and C++, with exposure to ML frameworks.
  • Familiar with ML compiler infrastructures and hardware-aware optimization.
  • Strong communication and cross-disciplinary collaboration skills.

Responsibilities

  • Architect and co-design ML models with traders and engineers, considering hardware constraints.
  • Translate ML requirements into concrete architectural decisions for custom hardware.
  • Deploy ML inference solutions from proof-of-concept to production with hardware teams.
  • Stay current with research in neural architecture search, ML systems, and quantization.

Skills

Hardware constraint mapping
VHDL/SystemVerilog
ML frameworks (PyTorch/TensorFlow)
Python
C++
Cross-functional collaboration

Education

MS or PhD in EE/CS/Physics

Tools

hls4ml
FINN
Vitis AI
MLIR
TVM/XLA

Job description

A leading global trading firm is expanding its machine learning capabilities and looking for an experienced Hardware Machine Learning Engineer to help deploy ML directly onto custom hardware.

This firm builds its own hardware, software, and infrastructure in-house, so when a model hits a latency wall or a resource ceiling, the engineer doesn't file a ticket and wait, they go fix it. There's no vendor to wait on and no abstraction layer they're not allowed to touch. This is a rare opportunity to architect solutions from scratch, influence technical research direction, and see the work drive real impact in one of the most demanding computing environments in the world.

What You'll Work On
  • Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints like latency budgets, resource limits, and numerical precision as first-class design inputs
  • Shape the custom hardware roadmap by translating ML model requirements into concrete architectural decisions
  • Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production
  • Track and evaluate emerging research in neural architecture search, machine learning systems, and quantization methods, and determine what translates to measurable improvements
Key Requirements
  • Understanding of hardware constraints and design trade-offs (pipelining, resource utilization, fixed-point arithmetic) that shape how ML models map onto FPGAs or custom ASICs
  • Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
  • Understanding of machine learning fundamentals: neural network architectures, inference optimization, quantization techniques, and ML frameworks such as PyTorch/TensorFlow
  • Proficiency in Python, C++, or similar languages for tooling, testing, and simulation
  • Strong communication skills and the ability to work collaboratively across disciplines with both technical and non-technical teams
  • An advanced degree (MS or PhD) in EE, CS, Physics, or a related field
Particularly Relevant Experience

Exposure to ML compiler infrastructure such as MLIR, TVM, or XLA; a background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, or real-time signal processing; familiarity with functional verification methodologies such as SystemVerilog, UVM, or Cocotb.

Trading experience is a bonus, not a prerequisite. The firm is looking for researchers and engineers from any background who want to push the boundaries of what's computationally possible.

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