Logic Design Engineering Manager

Insight Global (United States); North Reading (MA); On-site; USD 180,000 - 280,000; Full time

Job summary

Insight Global seeks an ASIC and Logic Design Engineering Manager to lead a 4–6 person FPGA/logic design team. You will oversee multiple concurrent FPGA or digital IP development projects from architecture through lab validation and production release, balancing schedules and budgets.

The role requires deep RTL design skills, extensive FPGA experience (Verilog, Vivado/Quartus), and strong leadership; you will collaborate with ASIC, board, software, and systems teams to meet product requirements.

Qualifications

• 12+ years of relevant digital FPGA design/integration experience.
• 5+ years as an FPGA/ASIC project lead, taking projects from concept and architecture through implementation, lab validation, and production.
• Extensive RTL coding experience, preferably Verilog.
• Experience with PCIe, DDR3/4/5, AXI, Ethernet, SPI, and SERDES.
• AMD/Xilinx or Altera/Intel FPGA experience using Vivado and/or Quartus.
• Familiar with digital verification methodologies, preferably UVM.
• LINT and CDC design quality tools.
• Bug tracking tools such as Jira.
• Source control and CI experience with tools such as Git, ClearCase, or CVS.
• Microsoft Project for scheduling.

Responsibilities

• Lead a team of approximately 4-6 FPGA/logic design engineers.
• Manage 2-3 simultaneous FPGA or digital IP development projects.
• Drive projects from architecture and design through lab validation and production release.
• Plan and track project schedules and budgets.
• Manage staffing across full-time, contract, and remote engineering resources.
• Represent the FPGA organization on core project teams and during program reviews.
• Remain hands-on technically and contribute RTL code when needed.
• Support hardware sustaining and troubleshooting efforts.
• Set employee goals, coach engineers, and manage compensation.
• Partner closely with FPGA verification, ASIC, board design, software, and systems engineering teams.
• Ensure FPGA and digital IP deliverables satisfy product requirements.
• Drive FPGA development process improvements.

Skills

RTL design

Verilog

Cadence

Static timing analysis

PCIe

DDR4/5

AXI

Ethernet

SPI

SERDES

Vivado

Quartus

Jira

Git

ClearCase

CVS

UVM

Microsoft Project

Education

BSEE

MSEE

Tools

Cadence

Vivado

Quartus

Jira

Git

ClearCase

CVS

Job description

Insight Global is seeking an ASIC and Logic Design Engineering Manager for a top semiconductor test and automation technology client. This individual will lead a team of approximately 4-6 engineers developing and verifying complex FPGAs and digital IP for next-generation compute test products. The role combines technical leadership and people management with hands-on engineering, including oversight of multiple concurrent development programs, project schedules, budgets, staffing, and cross-functional execution. The ideal candidate has deep FPGA/SoC expertise, strong RTL design skills, and a proven track record of taking complex digital hardware from initial architecture through lab validation and production.

Must-Haves:

• BSEE or MSEE
• 12+ years of relevant digital FPGA design/integration experience
• 5+ years as an FPGA/ASIC project lead, taking projects from concept and architecture through implementation, lab validation, and production
• Extensive RTL coding experience, preferably Verilog
• Digital simulation tools, preferably Cadence
• Static timing analysis expertise
• Experience with PCIe, DDR3/4/5, AXI, Ethernet, SPI, and SERDES
• AMD/Xilinx or Altera/Intel FPGA experience using Vivado and/or Quartus
• LINT and CDC design quality tools
• Bug tracking tools such as Jira
• Source control and CI experience with tools such as Git, ClearCase, or CVS
• Familiarity with digital verification methodologies, preferably UVM
• Project scheduling tools such as Microsoft Project
• Excellent presentation and communication skills
• Demonstrated ability to lead multiple technical projects and deliver on schedule

Plusses:

• Experience with both AMD/Xilinx and Altera/Intel FPGA ecosystems
• 2-3 years of direct engineering people-management experience
• Automated Test Equipment (ATE) hardware development experience
• Embedded processor experience
• Digital signal processing experience
• C/C++ programming experience

Day-to-Day:

• Lead a team of approximately 4-6 FPGA/logic design engineers
• Manage 2-3 simultaneous FPGA or digital IP development projects
• Drive projects from architecture and design through lab validation and production release
• Plan and track project schedules and budgets
• Manage staffing across full-time, contract, and remote engineering resources
• Represent the FPGA organization on core project teams and during program reviews
• Remain hands-on technically and contribute RTL code when needed
• Support hardware sustaining and troubleshooting efforts
• Set employee goals, coach engineers, and manage compensation
• Partner closely with FPGA verification, ASIC, board design, software, and systems engineering teams
• Ensure FPGA and digital IP deliverables satisfy product requirements
• Drive FPGA development process improvements