Lead Plasma Process Engineer – Semiconductor Devices

Applied Materials, Inc.; Santa Clara (CA); On-site; USD 124,000 - 171,000; Full time

Job summary

Applied Materials, Inc. in Santa Clara, CA is seeking a senior plasma process engineer to lead and execute complex process development initiatives across R&D and high-volume manufacturing.

You will design experiments, analyze data, optimize plasma processes, and mentor junior engineers while collaborating with cross-functional teams to deliver robust, scalable solutions for next‑generation semiconductor technologies.

Qualifications

• 5+ years of semiconductor plasma process engineering experience.
• Experience with plasma physics, RF power systems, and thin-film deposition or etch.
• Bachelor’s degree in a related field; PhD preferred.

Responsibilities

• Design, collect data, analyze, and compile reports on difficult process engineering experiments.
• Perform hardware characterization on a variety of difficult systems.
• Troubleshoot complex problems, perform Root Cause Analysis, and resolve a variety of difficult process engineering issues.
• Measure film properties and interpret data.
• Generate internal documentation for products, presentations, and technical reports.
• Communicate and engage with customers to resolve complex process engineering issues or concerns, under limited supervision.
• Identify, select, and partner with vendors and suppliers.
• Implement new technology, products, and analytical instrumentation.
• Serve as a resource for junior colleagues; lead project teams, as needed.

Skills

Plasma process engineering

RF power systems

Chamber matching

Process optimization

Thin-film deposition

Etch applications

R&D experience

Education

Bachelor's degree

PhD preferred

Job description

Applied Materials, Inc. in Santa Clara, CA is seeking a senior plasma process engineer to lead and execute complex process development initiatives across R&D and high-volume manufacturing.

You will design experiments, analyze data, optimize plasma processes, and mentor junior engineers while collaborating with cross-functional teams to deliver robust, scalable solutions for next‑generation semiconductor technologies.