Lead GPU Subsystem Verification Engineer

Samsung Semiconductor

Austin (TX)

On-site

USD 151,000 - 251,800

Full time

14 days+

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Benefits offered by this job

Medical insurance
401(k)
Tuition assistance
Paid time off
Wellness incentives

Job summary

Samsung Semiconductor in Austin, Texas, is seeking an experienced GPU Design Verification engineer. This role involves contributing to the verification strategy for GPU subsystems, developing verification testbenches using SystemVerilog and UVM. Candidates should have 6+ years of experience in semiconductor design verification or its equivalent educational background. The position is full-time with a base pay range of $151,000 to $251,800 and offers various employee benefits such as medical, tuition assistance, and wellness incentives.

Qualifications

  • 6+ years of experience with a Bachelor's degree or equivalent experience.
  • Hands-on experience in GPU, CPU, or advanced semiconductor design verification.
  • Working knowledge of computer architecture and GPU subsystem design.
  • Familiarity with functional coverage and assertions.
  • Hands-on experience in debugging and problem-solving skills.

Responsibilities

  • Contribute to the verification strategy and execution for GPU subsystems.
  • Design and maintain scalable verification testbenches using SystemVerilog and UVM.
  • Ensure functional and performance excellence across subsystem coverage.
  • Assist with complex debug and issue resolution across blocks within a subsystem.
  • Take initiatives on projects and help advance best practices.

Skills

C/C++ programming
Python
Perl
GPU and CPU design verification
Debugging skills
Communication skills

Education

Bachelor’s Degree in Computer Science/Engineering
Master’s Degree
Ph.D.

Tools

SystemVerilog
UVM

Job description

Samsung Semiconductor in Austin, Texas, is seeking an experienced GPU Design Verification engineer. This role involves contributing to the verification strategy for GPU subsystems, developing verification testbenches using SystemVerilog and UVM. Candidates should have 6+ years of experience in semiconductor design verification or its equivalent educational background. The position is full-time with a base pay range of $151,000 to $251,800 and offers various employee benefits such as medical, tuition assistance, and wellness incentives.
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