Lead FPGA Prototyping Engineer, SoC Platforms

Hardware FYI; San Jose, Northern (CA, KY); Hybrid; USD 140,000 - 210,000; Full time

Job summary

AMD in San Jose seeks an experienced FPGA prototyping engineer to lead architecture and platform strategy for complex SoCs. You will drive prototype platforms, RTL adaptation, and verification flows across multiple teams.

You will mentor engineers, shape processes, and collaborate with EDA vendors to enable early hardware validation and software bring-up, while ensuring delivery milestones.

Qualifications

• 7+ years of FPGA design and SoC prototyping experience.
• Experience leading FPGA prototyping for large semiconductor programs.
• Hands-on with Synopsys HAPS and Cadence Protium.
• Expert in multi-FPGA partitioning and high-speed interfaces (PCIe, DDR, Ethernet, USB, HBM).
• Proficient with Xilinx Vivado and Vitis.
• Strong timing closure, floorplanning, and CDC analysis.
• SystemVerilog/Verilog design and verification expertise.

Responsibilities

• Define and own FPGA prototyping architecture and platform strategy for complex SoCs.
• Lead development and deployment of FPGA prototype platforms and verification infra.
• Drive cross-functional collaboration for early hardware validation and software bring-up.
• Mentor FPGA prototyping engineers through reviews and best practices.
• Establish engineering processes, documentation standards, and continuous improvement.
• Represent group in reviews and partner with tool vendors to drive adoption.

Skills

FPGA design

Leadership

SystemVerilog/Verilog

SoC prototyping

Multi-FPGA partitioning

High-speed interfaces

Timing closure

Education

Bachelor/Master in Electrical or Computer Engineering

Tools

Synopsys HAPS

Cadence Protium

Vivado

Vitis

Job description

AMD in San Jose seeks an experienced FPGA prototyping engineer to lead architecture and platform strategy for complex SoCs. You will drive prototype platforms, RTL adaptation, and verification flows across multiple teams.

You will mentor engineers, shape processes, and collaborate with EDA vendors to enable early hardware validation and software bring-up, while ensuring delivery milestones.