Lead Electrical Engineer

NASA Jet Propulsion Laboratory; Pasadena (CA); On-site; USD 164,000 - 197,000; Full time

Job summary

NASA's Jet Propulsion Laboratory in Pasadena seeks an Electrical Engineer IV to lead the design and testing of spacecraft avionics and power subsystems. You will guide FPGA development, CCA/test hardware, and verification procedures, coordinating specialists and reporting to the Ground Support Hardware Group.

You will deliver complex test systems, collaborate across teams, and document procedures, ensuring quality within budget and schedule constraints in a mission-driven environment.

Qualifications

• Bachelor's degree in Electrical Engineering with 9+ years of related work, or Master's with 7+ years, or PhD with 5+ years.
• Strong background in design/analysis of avionics and/or power analog and digital circuits.
• Knowledge of industry/academic practices and standards across applications.
• Ability to prioritize, meet commitments, and deliver quality within budget.
• Experience with configuration management tools (Git, SVN, JIRA).
• Strong analytical and problem-solving skills.
• Ability to collaborate with all levels of institutional and operations personnel.
• Proven ability as a team leader to deliver project results and manage performance, budgets, and schedules.
• Excellent interpersonal skills to work with internal and external leadership and delegate tasks.

Responsibilities

• Derive and document engineering requirements, specifications, and interface drawings for test assemblies.
• Define FPGA requirements for electronic test systems and guide design.
• Review design analyses for accuracy and completeness.
• Coordinate specialist engineers to develop integrated design.
• Lead team communications regarding technical issues and resolution.
• Plan CCA, chassis, and rack assembly implementations.
• Oversee implementation and delivery to users and stakeholders.
• Develop detailed test and verification plans from requirements.
• Produce documentation including test procedures, results, and reports.
• Participate in development of contract technical documentation.
• Provide contract insight and oversight for small contracts.

Skills

Avionics design

Power electronics

Team leadership

Analytical problem solving

Collaboration across levels

Budget and scheduling

Education

Bachelor's degree in Electrical Engineering (BSEE)

Master's degree in similar discipline

PhD in similar discipline

Tools

Git

SVN

JIRA

Job description

Job Details

New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have guided generations, then share our discoveries to inspire generations to come. Your mission—your opportunity—is to seek out the answers that bring us one step closer. If you’re driven to discover, create, and inspire something that lasts a lifetime and beyond, you’re ready for JPL.

Job Details

Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.

Responsibilities

JPL’s Avionics, Power & Instrument Electronics Section builds flight electronics for JPL’s interplanetary and Earth orbiting spacecraft. We provide leadership and unique world‑class expertise in defining system architectures and electronics platforms for avionics, motor control, power, and instruments, leveraging simulation, support equipment and PLM solution infrastructure, critical partnerships and technology development.

You will be an Electrical Engineer IV and will be a member of the Avionics, Power & Instrument Electronics Section. You will report administratively to the Group Supervisor for the Ground Support Hardware Group.

You will lead the design and development of highly complex and critical electronics test systems for spacecraft avionics and power subsystem testing. Test system deliverables include circuit card assemblies (CCAs), FPGA IP, chassis assemblies, rack assemblies, as well as test procedures and scripts.

Tasks include but are not limited to

• Derive and document engineering requirements, specifications, and interface definition drawings for test assemblies
• Define requirements and guide design and implementation of FPGAs for electronic test systems
• Review design analyses to ensure accuracy and completeness
• Coordinate specialist engineers to develop integrated design
• Lead team communications regarding technical issues and problem resolution
• Plan CCA, chassis assembly, and rack assembly implementations
• Oversee implementation and delivery to users and stakeholders
• Develop detailed test and verification plans based on requirements
• Produce comprehensive documentation including test procedures, results, training guides, and issue reports
• Participate in development of contract technical documentation
• Provide contract insight and oversight for small contracts

Qualifications

• Bachelor's degree in Electrical Engineering (BSEE) with a minimum of 9 years of related work experience, or Master's degree in similar discipline with a minimum of 7 years of related work experience or PhD degree in similar discipline with a minimum of 5 years of related work experience.
• Strong background in design and/or analysis of avionics and/or power analog and digital circuits
• Complete knowledge of industry and/or academic practices and standards across a range of applications
• Flexible and accountable to meet commitments and produce quality products within budget through effective prioritization
• Experience with configuration management tools (e.g., GIT, SVN, JIRA)
• Strong analytical and problem‑solving skills
• Ability to collaborate effectively with all levels of institutional and operations personnel
• Proven ability as a team leader to deliver project results and manage performance standards, budgets, and schedules
• Exceptional interpersonal skills with ability to work effectively with internal and external program leadership and delegate tasks to team members

Preferred Skills

• Experience with radiation‑tolerant flight processors (e.g., RAD750) and associated compute element architectures
• Experience with FPGA‑based embedded avionics or firmware‑hardware co‑design
• Familiarity with JPL or NASA flight hardware design flow, EEE parts control, and packaging/cabling requirements
• Prior experience supporting flight hardware I&T, EMs/PFMs, and delivery to spacecraft‑level Assembly, Test, and Launch Operations (ATLO)
• Experience with power electronics interfaces (solar array, RTG, battery‑based power buses)
• Experience with FPGA‑based systems, or power electronics.
• Prior experience as a technical lead or subject‑matter expert.
• Strong problem‑solving, analytical, and communication skills.
• Ability to manage multiple priorities and interface with diverse engineering teams.
• Comfortable working in a fast‑paced, mission‑focused environment.

JPL has a catalog of benefits and perks that span from the traditional to the unique. This includes a variety of health, dental, vision, wellbeing, and retirement plans, paid time off, learning, rideshare, childcare, flexible schedule, parental leave and many more. Our focus is on work‑life balance, and living healthy, fulfilling lives as we Dare Mighty Things Together. For benefits eligible positions, benefits are effective the first day of the month coincident with or immediately following the employee’s start date.

The typical full time equivalent annual hiring range for this job in Pasadena, California.

$163,904 - $197,288

JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.

In addition, JPL is a VEVRAA Federal Contractor.

EEO is the Law.

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Pay Transparency Nondiscrimination Provision

The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are U.S. Citizens, Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here.